URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.18.50/] [gas/] [testsuite/] [gas/] [mips/] [ulh2-el.d] - Rev 438
Go to most recent revision | Compare with Previous | Blame | View Log
#as: -EL -32
#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric
#name: ulh2 -EL
#source: ulh2.s
# Further checks of ulh/ulhu macros.
.*: +file format .*mips.*
Disassembly of section .text:
0+0000 <[^>]*> 80a10001 lb \$1,1\(\$5\)
0+0004 <[^>]*> 90a40000 lbu \$4,0\(\$5\)
0+0008 <[^>]*> 00010a00 sll \$1,\$1,0x8
0+000c <[^>]*> 00812025 or \$4,\$4,\$1
0+0010 <[^>]*> 80a10002 lb \$1,2\(\$5\)
0+0014 <[^>]*> 90a40001 lbu \$4,1\(\$5\)
0+0018 <[^>]*> 00010a00 sll \$1,\$1,0x8
0+001c <[^>]*> 00812025 or \$4,\$4,\$1
0+0020 <[^>]*> 80a10001 lb \$1,1\(\$5\)
0+0024 <[^>]*> 90a50000 lbu \$5,0\(\$5\)
0+0028 <[^>]*> 00010a00 sll \$1,\$1,0x8
0+002c <[^>]*> 00a12825 or \$5,\$5,\$1
0+0030 <[^>]*> 80a10002 lb \$1,2\(\$5\)
0+0034 <[^>]*> 90a50001 lbu \$5,1\(\$5\)
0+0038 <[^>]*> 00010a00 sll \$1,\$1,0x8
0+003c <[^>]*> 00a12825 or \$5,\$5,\$1
0+0040 <[^>]*> 90a10001 lbu \$1,1\(\$5\)
0+0044 <[^>]*> 90a40000 lbu \$4,0\(\$5\)
0+0048 <[^>]*> 00010a00 sll \$1,\$1,0x8
0+004c <[^>]*> 00812025 or \$4,\$4,\$1
0+0050 <[^>]*> 90a10002 lbu \$1,2\(\$5\)
0+0054 <[^>]*> 90a40001 lbu \$4,1\(\$5\)
0+0058 <[^>]*> 00010a00 sll \$1,\$1,0x8
0+005c <[^>]*> 00812025 or \$4,\$4,\$1
0+0060 <[^>]*> 90a10001 lbu \$1,1\(\$5\)
0+0064 <[^>]*> 90a50000 lbu \$5,0\(\$5\)
0+0068 <[^>]*> 00010a00 sll \$1,\$1,0x8
0+006c <[^>]*> 00a12825 or \$5,\$5,\$1
0+0070 <[^>]*> 90a10002 lbu \$1,2\(\$5\)
0+0074 <[^>]*> 90a50001 lbu \$5,1\(\$5\)
0+0078 <[^>]*> 00010a00 sll \$1,\$1,0x8
0+007c <[^>]*> 00a12825 or \$5,\$5,\$1
\.\.\.
Go to most recent revision | Compare with Previous | Blame | View Log