Subversion Repositories openrisc_2011-10-31

2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-dis.c (MOVBE_Fixup): New.
        (Mo): Likewise.
        (PREFIX_0F3880): Likewise.
        (PREFIX_0F3881): Likewise.
        (PREFIX_0F38F0): Updated.
        (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
        PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
        (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.

        * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
        CPU_EPT_FLAGS.
        (cpu_flags): Add CpuMovbe and CpuEPT.

        * i386-opc.h (CpuMovbe): New.
        (CpuEPT): Likewise.
        (CpuLM): Updated.
        (i386_cpu_flags): Add cpumovbe and cpuept.

        * i386-opc.tbl: Add entries for movbe and EPT instructions.
        * i386-init.h: Regenerated.
        * i386-tbl.h: Likewise.

2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>

        * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
        the two drem and the two dremu macros.

2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>

        * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
        instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
        cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
        INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.

2008-04-25  David S. Miller  <davem@davemloft.net>

        * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
        instead of %sys_tick_cmpr, as suggested in architecture manuals.

2008-04-23  Paolo Bonzini  <bonzini@gnu.org>

        * aclocal.m4: Regenerate.
        * configure: Regenerate.

2008-04-23  David S. Miller  <davem@davemloft.net>

        * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
        extended values.
        (prefetch_table): Add missing values.

2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c (opcode_modifiers): Add NoAVX.

        * i386-opc.h (NoAVX): New.
        (OldGcc): Updated.
        (i386_opcode_modifier): Add noavx.

        * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
        instructions which don't have AVX equivalent.
        * i386-tbl.h: Regenerated.

2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-dis.c (OP_VEX_FMA): New.
        (OP_EX_VexImmW): Likewise.
        (VexFMA): Likewise.
        (Vex128FMA): Likewise.
        (EXVexImmW): Likewise.
        (get_vex_imm8): Likewise.
        (OP_EX_VexReg): Likewise.
        (vex_i4_done): Renamed to ...
        (vex_w_done): This.
        (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
        and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
        FMA instructions.
        (print_insn): Updated.
        (OP_EX_VexW): Rewrite to swap register in VEX with EX.
        (OP_REG_VexI4): Check invalid high registers.

2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
            Michael Meissner  <michael.meissner@amd.com>

        * i386-opc.tbl: Fix protX to allow memory in the middle operand.
        * i386-tbl.h: Regenerate from i386-opc.tbl.
        
2008-04-14  Edmar Wienskoski  <edmar@freescale.com>

        * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
        accept Power E500MC instructions.
        (print_ppc_disassembler_options): Document -Me500mc.
        * ppc-opc.c (DUIS, DUI, T): New.
        (XRT, XRTRA): Likewise.
        (E500MC): Likewise.
        (powerpc_opcodes): Add new Power E500MC instructions.

2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>

        * s390-dis.c (init_disasm): Evaluate disassembler_options.
        (print_s390_disassembler_options): New function.
        * disassemble.c (disassembler_usage): Invoke
        print_s390_disassembler_options.

2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>

        * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
        of local variables used for mnemonic parsing: prefix, suffix and
        number.

2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>

        * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
        extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
        (s390_crb_extensions): New extensions table.
        (insertExpandedMnemonic): Handle '$' tag.
        * s390-opc.txt: Remove conditional jump variants which can now
        be expanded automatically.
        Replace '*' tag with '$' in the compare and branch instructions.

2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
        (PREFIX_VEX_3AXX): Likewis.

2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-opc.tbl: Remove 4 extra blank lines.

2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
        with CPU_PCLMUL_FLAGS/CpuPCLMUL.
        (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
        * i386-opc.tbl: Likewise.

        * i386-opc.h (CpuCLMUL): Renamed to ...
        (CpuPCLMUL): This.
        (CpuFMA): Updated.
        (i386_cpu_flags): Replace cpuclmul with cpupclmul.

        * i386-init.h: Regenerated.

2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-dis.c (OP_E_register): New.
        (OP_E_memory): Likewise.
        (OP_VEX): Likewise.
        (OP_EX_Vex): Likewise.
        (OP_EX_VexW): Likewise.
        (OP_XMM_Vex): Likewise.
        (OP_XMM_VexW): Likewise.
        (OP_REG_VexI4): Likewise.
        (PCLMUL_Fixup): Likewise.
        (VEXI4_Fixup): Likewise.
        (VZERO_Fixup): Likewise.
        (VCMP_Fixup): Likewise.
        (VPERMIL2_Fixup): Likewise.
        (rex_original): Likewise.
        (rex_ignored): Likewise.
        (Mxmm): Likewise.
        (XMM): Likewise.
        (EXxmm): Likewise.
        (EXxmmq): Likewise.
        (EXymmq): Likewise.
        (Vex): Likewise.
        (Vex128): Likewise.
        (Vex256): Likewise.
        (VexI4): Likewise.
        (EXdVex): Likewise.
        (EXqVex): Likewise.
        (EXVexW): Likewise.
        (EXdVexW): Likewise.
        (EXqVexW): Likewise.
        (XMVex): Likewise.
        (XMVexW): Likewise.
        (XMVexI4): Likewise.
        (PCLMUL): Likewise.
        (VZERO): Likewise.
        (VCMP): Likewise.
        (VPERMIL2): Likewise.
        (xmm_mode): Likewise.
        (xmmq_mode): Likewise.
        (ymmq_mode): Likewise.
        (vex_mode): Likewise.
        (vex128_mode): Likewise.
        (vex256_mode): Likewise.
        (USE_VEX_C4_TABLE): Likewise.
        (USE_VEX_C5_TABLE): Likewise.
        (USE_VEX_LEN_TABLE): Likewise.
        (VEX_C4_TABLE): Likewise.
        (VEX_C5_TABLE): Likewise.
        (VEX_LEN_TABLE): Likewise.
        (REG_VEX_XX): Likewise.
        (MOD_VEX_XXX): Likewise.
        (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
        (PREFIX_0F3A44): Likewise.
        (PREFIX_0F3ADF): Likewise.
        (PREFIX_VEX_XXX): Likewise.
        (VEX_OF): Likewise.
        (VEX_OF38): Likewise.
        (VEX_OF3A): Likewise.
        (VEX_LEN_XXX): Likewise.
        (vex): Likewise.
        (need_vex): Likewise.
        (need_vex_reg): Likewise.
        (vex_i4_done): Likewise.
        (vex_table): Likewise.
        (vex_len_table): Likewise.
        (OP_REG_VexI4): Likewise.
        (vex_cmp_op): Likewise.
        (pclmul_op): Likewise.
        (vpermil2_op): Likewise.
        (m_mode): Updated.
        (es_reg): Likewise.
        (PREFIX_0F38F0): Likewise.
        (PREFIX_0F3A60): Likewise.
        (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
        (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
        and PREFIX_VEX_XXX entries.
        (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
        (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
        PREFIX_0F3ADF.
        (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
        Add MOD_VEX_XXX entries.
        (ckprefix): Initialize rex_original and rex_ignored.  Store the
        REX byte in rex_original.
        (get_valid_dis386): Handle the implicit prefix in VEX prefix
        bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
        (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
        calling get_valid_dis386.  Use rex_original and rex_ignored when
        printing out REX.
        (putop): Handle "XY".
        (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
        ymmq_mode.
        (OP_E_extended): Updated to use OP_E_register and
        OP_E_memory.
        (OP_XMM): Handle VEX.
        (OP_EX): Likewise.
        (XMM_Fixup): Likewise.
        (CMP_Fixup): Use ARRAY_SIZE.

        * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
        CPU_FMA_FLAGS and CPU_AVX_FLAGS.
        (operand_type_init): Add OPERAND_TYPE_REGYMM and
        OPERAND_TYPE_VEX_IMM4.
        (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
        (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
        VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
        VexImmExt and SSE2AVX.
        (operand_types): Add RegYMM, Ymmword and Vex_Imm4.

        * i386-opc.h (CpuAVX): New.
        (CpuAES): Likewise.
        (CpuCLMUL): Likewise.
        (CpuFMA): Likewise.
        (Vex): Likewise.
        (Vex256): Likewise.
        (VexNDS): Likewise.
        (VexNDD): Likewise.
        (VexW0): Likewise.
        (VexW1): Likewise.
        (Vex0F): Likewise.
        (Vex0F38): Likewise.
        (Vex0F3A): Likewise.
        (Vex3Sources): Likewise.
        (VexImmExt): Likewise.
        (SSE2AVX): Likewise.
        (RegYMM): Likewise.
        (Ymmword): Likewise.
        (Vex_Imm4): Likewise.
        (Implicit1stXmm0): Likewise.
        (CpuXsave): Updated.
        (CpuLM): Likewise.
        (ByteOkIntel): Likewise.
        (OldGcc): Likewise.
        (Control): Likewise.
        (Unspecified): Likewise.
        (OTMax): Likewise.
        (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
        (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
        vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
        vex3sources, veximmext and sse2avx.
        (i386_operand_type): Add regymm, ymmword and vex_imm4.

        * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.

        * i386-reg.tbl: Add AVX registers, ymm0..ymm15.

        * i386-init.h: Regenerated.
        * i386-tbl.h: Likewise.

2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>

        From  Robin Getz  <robin.getz@analog.com>
        * bfin-dis.c (bu32): Typedef.
        (enum const_forms_t): Add c_uimm32 and c_huimm32.
        (constant_formats[]): Add uimm32 and huimm16.
        (fmtconst_val): New.
        (uimm32): Define.
        (huimm32): Define.
        (imm16_val): Define.
        (luimm16_val): Define.
        (struct saved_state): Define.
        (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
        A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
        LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
        (get_allreg): New.
        (decode_LDIMMhalf_0): Print out the whole register value.

        From Jie Zhang  <jie.zhang@analog.com>
        * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
        multiply and multiply-accumulate to data register instruction.

        * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
        c_imm32, c_huimm32e): Define.
        (constant_formats): Add flags for printing decimal, leading spaces, and
        exact symbols.
        (comment, parallel): Add global flags in all disassembly.
        (fmtconst): Take advantage of new flags, and print default in hex.
        (fmtconst_val): Likewise.
        (decode_macfunc): Be consistant with spaces, tabs, comments,
        capitalization in disassembly, fix minor coding style issues.
        (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
        (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
        decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
        decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
        decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
        decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
        decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
        decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
        decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
        decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
        _print_insn_bfin, print_insn_bfin): Likewise.

2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>

        * aclocal.m4: Regenerate.
        * configure: Likewise.
        * Makefile.in: Likewise.

2008-03-13  Alan Modra  <amodra@bigpond.net.au>

        * Makefile.am: Run "make dep-am".
        * Makefile.in: Regenerate.
        * configure: Regenerate.

2008-03-07  Alan Modra  <amodra@bigpond.net.au>

        * ppc-opc.c (powerpc_opcodes): Order and format.

2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
        * i386-tbl.h: Regenerated.

2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-opc.tbl: Disallow 16-bit near indirect branches for
        x86-64.
        * i386-tbl.h: Regenerated.

2008-02-21  Jan Beulich  <jbeulich@novell.com>

        * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
        and Fword for far indirect jmp. Allow Reg16 and Word for near
        indirect jmp on x86-64. Disallow Fword for lcall.
        * i386-tbl.h: Re-generate.

2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>

        * cr16-opc.c  (cr16_num_optab): Defined

2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
        * i386-init.h: Regenerated.

2008-02-14  Nick Clifton  <nickc@redhat.com>

        PR binutils/5524
        * configure.in (SHARED_LIBADD): Select the correct host specific
        file extension for shared libraries.
        * configure: Regenerate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

        * i386-opc.h (RegFlat): New.
        * i386-reg.tbl (flat): Add.
        * i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

        * i386-dis.c (a_mode): New.
        (cond_jump_mode): Adjust.
        (Ma): Change to a_mode.
        (intel_operand_size): Handle a_mode.
        * i386-opc.tbl: Allow Dword and Qword for bound.
        * i386-tbl.h: Re-generate.

2008-02-13  Jan Beulich  <jbeulich@novell.com>

        * i386-gen.c (process_i386_registers): Process new fields.
        * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
        unsigned char. Add dw2_regnum and Dw2Inval.
        * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
        register names.
        * i386-tbl.h: Re-generate.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
        * i386-init.h: Updated.

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c (cpu_flags): Add CpuXsave.

        * i386-opc.h (CpuXsave): New.
        (CpuLM): Updated.
        (i386_cpu_flags): Add cpuxsave.

        * i386-dis.c (MOD_0FAE_REG_4): New.
        (RM_0F01_REG_2): Likewise.
        (MOD_0FAE_REG_5): Updated.
        (RM_0F01_REG_3): Likewise.
        (reg_table): Use MOD_0FAE_REG_4.
        (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
        for xrstor.
        (rm_table): Add RM_0F01_REG_2.

        * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
        * i386-init.h: Regenerated.
        * i386-tbl.h: Likewise.

2008-02-11  Jan Beulich  <jbeulich@novell.com>

        * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
        Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
        * i386-tbl.h: Re-generate.

2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>

        PR 5715
        * configure: Regenerated.

2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>

        * mips-dis.c: Update copyright.
        (mips_arch_choices): Add Octeon.
        * mips-opc.c: Update copyright.
        (IOCT): New macro.
        (mips_builtin_opcodes): Add Octeon instruction synciobdma.

2008-01-29  Alan Modra  <amodra@bigpond.net.au>

        * ppc-opc.c: Support optional L form mtmsr.

2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-dis.c (OP_E_extended): Handle r12 like rsp.

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
        * i386-init.h: Regenerated.

2008-01-23  Tristan Gingold  <gingold@adacore.com>

        * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
        ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
        (cpu_flags): Likewise.

        * i386-opc.h (CpuMMX2): Removed.
        (CpuSSE): Updated.

        * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
        * i386-init.h: Regenerated.
        * i386-tbl.h: Likewise.

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
        CPU_SMX_FLAGS.
        * i386-init.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-opc.tbl: Use Qword on movddup.
        * i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
        * i386-tbl.h: Regenerated.

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-dis.c (Mx): New.
        (PREFIX_0FC3): Likewise.
        (PREFIX_0FC7_REG_6): Updated.
        (dis386_twobyte): Use PREFIX_0FC3.
        (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
        Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
        movntss.

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c (opcode_modifiers): Add IntelSyntax.
        (operand_types): Add Mem.

        * i386-opc.h (IntelSyntax): New.
        * i386-opc.h (Mem): New.
        (Byte): Updated.
        (Opcode_Modifier_Max): Updated.
        (i386_opcode_modifier): Add intelsyntax.
        (i386_operand_type): Add mem.

        * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
        instructions.

        * i386-reg.tbl: Add size for accumulator.

        * i386-init.h: Regenerated.
        * i386-tbl.h: Likewise.

2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-opc.h (Byte): Fix a typo.

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

        PR gas/5534
        * i386-gen.c (operand_type_init): Add Dword to
        OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
        (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
        Qword and Xmmword.
        (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
        Xmmword, Unspecified and Anysize.
        (set_bitfield): Make Mmword an alias of Qword.  Make Oword
        an alias of Xmmword.

        * i386-opc.h (CheckSize): Removed.
        (Byte): Updated.
        (Word): Likewise.
        (Dword): Likewise.
        (Qword): Likewise.
        (Xmmword): Likewise.
        (FWait): Updated.
        (OTMax): Likewise.
        (i386_opcode_modifier): Remove checksize, byte, word, dword,
        qword and xmmword.
        (Fword): New.
        (TBYTE): Likewise.
        (Unspecified): Likewise.
        (Anysize): Likewise.
        (i386_operand_type): Add byte, word, dword, fword, qword,
        tbyte xmmword, unspecified and anysize.

        * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
        Tbyte, Xmmword, Unspecified and Anysize.

        * i386-reg.tbl: Add size for accumulator.

        * i386-init.h: Regenerated.
        * i386-tbl.h: Likewise.

2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
        (REG_0F18): Updated.
        (reg_table): Updated.
        (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
        (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c (set_bitfield): Use fail () on error.

2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c (lineno): New.
        (filename): Likewise.
        (set_bitfield): Report filename and line numer on error.
        (process_i386_opcodes): Set filename and update lineno.
        (process_i386_registers): Likewise.

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
        ATTSyntax.

        * i386-opc.h (IntelMnemonic): Renamed to ..
        (ATTSyntax): This
        (Opcode_Modifier_Max): Updated.
        (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
        and intelsyntax.

        * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax 
        on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
        * i386-tbl.h: Regenerated.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c: Update copyright to 2008.
        * i386-opc.h: Likewise.
        * i386-opc.tbl: Likewise.

        * i386-init.h: Regenerated.
        * i386-tbl.h: Likewise.

2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
        pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
        * i386-tbl.h: Regenerated.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
        CpuSSE4_2_Or_ABM.
        (cpu_flags): Likewise.

        * i386-opc.h (CpuSSE4_1_Or_5): Removed.
        (CpuSSE4_2_Or_ABM): Likewise.
        (CpuLM): Updated.
        (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.

        * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
        Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
        and CpuPadLock, respectively.
        * i386-init.h: Regenerated.
        * i386-tbl.h: Likewise.

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c (opcode_modifiers): Remove No_xSuf.

        * i386-opc.h (No_xSuf): Removed.
        (CheckSize): Updated.

        * i386-tbl.h: Regenerated.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
        CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
        CPU_SSE5_FLAGS.
        (cpu_flags): Add CpuSSE4_2_Or_ABM.

        * i386-opc.h (CpuSSE4_2_Or_ABM): New.
        (CpuLM): Updated.
        (i386_cpu_flags): Add cpusse4_2_or_abm.

        * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
        CpuABM|CpuSSE4_2 on popcnt.
        * i386-init.h: Regenerated.
        * i386-tbl.h: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-opc.h: Update comments.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

        * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
        * i386-opc.h: Likewise.
        * i386-opc.tbl: Likewise.

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

        PR gas/5534
        * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
        Byte, Word, Dword, QWord and Xmmword.

        * i386-opc.h (No_xSuf): New.
        (CheckSize): Likewise.
        (Byte): Likewise.
        (Word): Likewise.
        (Dword): Likewise.
        (QWord): Likewise.
        (Xmmword): Likewise.
        (FWait): Updated.
        (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
        Dword, QWord and Xmmword.

        * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
        used.
        * i386-tbl.h: Regenerated.

2008-01-02  Mark Kettenis  <kettenis@gnu.org>

        * m88k-dis.c (instructions): Fix fcvt.* instructions.
        From Miod Vallat.

For older changes see ChangeLog-2007

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