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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [gas/] [testsuite/] [gas/] [arm/] [arm3.d] - Rev 277
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# name: ARM 3 instructions
# as: -mcpu=arm3
# objdump: -dr --prefix-addresses --show-raw-insn
.*: +file format .*arm.*
Disassembly of section .text:
0+0 <[^>]*> e1080091 ? swp r0, r1, \[r8\]
0+4 <[^>]*> e1423093 ? swpb r3, r3, \[r2\]
0+8 <[^>]*> a1454091 ? swpbge r4, r1, \[r5\]
0+c <[^>]*> e1a00000 ? nop ; \(mov r0, r0\)
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