OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [binutils-2.20.1/] [ld/] [testsuite/] [ld-elf/] [orphan3.d] - Rev 262

Go to most recent revision | Compare with Previous | Blame | View Log

#source: orphan3a.s
#source: orphan3b.s
#source: orphan3c.s
#source: orphan3d.s
#source: orphan3e.s
#source: orphan3f.s
#ld:
#readelf: -S --wide
#xfail: "arc-*-*" "d30v-*-*" "dlx-*-*" "fr30-*-*" "frv-*-*"
#xfail: "i860-*-*" "i960-*-*" "iq2000-*-*" "mn10200-*-*" "msp430-*-*" "mt-*-*"
#xfail: "or32-*-*" "pj-*-*"
#xfail: "cr16-*-*" "crx-*-*" "d10v-*-*" "xstormy16-*-*"

#...
  \[[ 0-9]+\] \.foo +PROGBITS +[0-9a-f]+ +[0-9a-f]+ +0+20 +0+ +A +0 +0 +[0-9]+
#...
  \[[ 0-9]+\] \.foo +NOBITS +[0-9a-f]+ +[0-9a-f]+ +0+20 +0+ +A +0 +0 +[0-9]+
#...
  \[[ 0-9]+\] \.foo +PROGBITS +0+ +[0-9a-f]+ +0+20 +0+ +0 +0 +[0-9]+
  \[[ 0-9]+\] \.[^f].*
#pass

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.