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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.2.2/] [gcc/] [config/] [or32/] [or32.opt] - Rev 177
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; Options for the OR32 port of the compiler
mhard-float
Target RejectNegative Mask(HARD_FLOAT)
Use hardware floating point
msoft-float
Target RejectNegative InverseMask(HARD_FLOAT)
Do not use hardware floating point
mdouble-float
Target Report RejectNegative Mask(DOUBLE_FLOAT)
Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
mhard-div
Target RejectNegative Mask(HARD_DIV)
Use hardware division
msoft-div
Target RejectNegative InverseMask(HARD_DIV)
Do not use hardware division
mhard-mul
Target RejectNegative Mask(HARD_MUL)
Use hardware multiplication
msoft-mul
Target RejectNegative InverseMask(HARD_MUL)
Do not use hardware multiplication
maj
Target Mask(MASK_ALIGNED_JUMPS)
Use aligned jumps
msext
Target Mask(MASK_SEXT)
Use sign-extending instructions
mcmov
Target Mask(MASK_CMOV)
Use conditional move instructions
mlogue
Target Mask(MASK_SCHED_LOGUE)
Schedule prologue/epilogue
mror
Target Mask(MASK_ROR)
Emit ROR instructions
msibcall
Target Mask(MASK_SIBCALL)
Enable sibcall optimization
mor32-newlib
Target RejectNegative
Link with the OR32 newlib library
mor32-newlib-uart
Target RejectNegative
Link with the OR32 newlib UART library