URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [arc/] [arc-modes.def] - Rev 300
Go to most recent revision | Compare with Previous | Blame | View Log
/* Definitions of target machine for GNU compiler, Argonaut ARC cpu.
Copyright (C) 2002, 2007 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* Some insns set all condition code flags, some only set the ZNC flags, and
some only set the ZN flags. */
CC_MODE (CCZNC);
CC_MODE (CCZN);
Go to most recent revision | Compare with Previous | Blame | View Log