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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [arc/] [arc.opt] - Rev 301

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; Options for the Argonaut ARC port of the compiler
;
; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3.  If not see
; <http://www.gnu.org/licenses/>.

malign-loops
Target Undocumented Report Mask(ALIGN_LOOPS)

mbig-endian
Target Undocumented Report RejectNegative Mask(BIG_ENDIAN)

mlittle-endian
Target Undocumented Report RejectNegative InverseMask(BIG_ENDIAN)

mmangle-cpu
Target Report Mask(MANGLE_CPU)
Prepend the name of the cpu to all public symbol names

; mmangle-cpu-libgcc
; Target Undocumented Mask(MANGLE_CPU_LIBGC)

mno-cond-exec
Target Undocumented Report RejectNegative Mask(NO_COND_EXEC)

mcpu=
Target RejectNegative Joined Var(arc_cpu_string) Init("base")
-mcpu=CPU       Compile code for ARC variant CPU

mtext=
Target RejectNegative Joined Var(arc_text_string) Init(ARC_DEFAULT_TEXT_SECTION)
-mtext=SECTION  Put functions in SECTION

mdata=
Target RejectNegative Joined Var(arc_data_string) Init(ARC_DEFAULT_DATA_SECTION)
-mdata=SECTION  Put data in SECTION

mrodata=
Target RejectNegative Joined Var(arc_rodata_string) Init(ARC_DEFAULT_RODATA_SECTION)
-mrodata=SECTION        Put read-only data in SECTION

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