URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [mep/] [mep.opt] - Rev 282
Compare with Previous | Blame | View Log
; Target specific command line options for the MEP port of the compiler.
; Copyright (C) 2005, 2007, 2009 Free Software Foundation, Inc.
; Contributed by Red Hat Inc.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
; for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3. If not see
; <http://www.gnu.org/licenses/>. */
mabsdiff
Target Mask(OPT_ABSDIFF)
Enable absolute difference instructions
mall-opts
Target RejectNegative
Enable all optional instructions
maverage
Target Mask(OPT_AVERAGE)
Enable average instructions
mbased=
Target Joined Var(mep_based_cutoff) RejectNegative UInteger Init(0)
Variables this size and smaller go in the based section. (default 0)
mbitops
Target Mask(OPT_BITOPS)
Enable bit manipulation instructions
mc=
Target Joined Var(mep_const_section) RejectNegative
Section to put all const variables in (tiny, near, far) (no default)
mclip
Target Mask(OPT_CLIP)
Enable clip instructions
mconfig=
Target Joined Var(mep_config_string) RejectNegative
Configuration name
mcop
Target Mask(COP)
Enable MeP Coprocessor
mcop32
Target Mask(COP) MaskExists RejectNegative
Enable MeP Coprocessor with 32-bit registers
mcop64
Target Mask(64BIT_CR_REGS) RejectNegative
Enable MeP Coprocessor with 64-bit registers
mivc2
Target Mask(IVC2) RejectNegative
Enable IVC2 scheduling
mdc
Target Mask(DC) RejectNegative
Const variables default to the near section
mdebug
Target Disabled Undocumented
mdiv
Target Mask(OPT_DIV)
Enable 32-bit divide instructions
meb
Target InverseMask(LITTLE_ENDIAN) RejectNegative
Use big-endian byte order
mel
Target Mask(LITTLE_ENDIAN) RejectNegative
Use little-endian byte order
mio-volatile
Target Mask(IO_VOLATILE)
__io vars are volatile by default
ml
Target Mask(L) RejectNegative
All variables default to the far section
mleadz
Target Mask(OPT_LEADZ)
Enable leading zero instructions
mlibrary
Target Mask(LIBRARY) RejectNegative Undocumented
mm
Target Mask(M) RejectNegative
All variables default to the near section
mminmax
Target Mask(OPT_MINMAX)
Enable min/max instructions
mmult
Target Mask(OPT_MULT)
Enable 32-bit multiply instructions
mno-opts
Target RejectNegative
Disable all optional instructions
mrand-tpgp
Target Mask(RAND_TPGP) RejectNegative Undocumented
mrepeat
Target Mask(OPT_REPEAT)
Allow gcc to use the repeat/erepeat instructions
ms
Target Mask(S) RejectNegative
All variables default to the tiny section
msatur
Target Mask(OPT_SATUR)
Enable saturation instructions
msdram
Target
Use sdram version of runtime
msim
Target RejectNegative
Use simulator runtime
msimnovec
Target RejectNegative
Use simulator runtime without vectors
mtf
Target Mask(TF) RejectNegative
All functions default to the far section
mtiny=
Target Joined Var(mep_tiny_cutoff) RejectNegative UInteger Init(4)
Variables this size and smaller go in the tiny section. (default 4)
mvl32
Target InverseMask(OPT_VL64) Undocumented RejectNegative
mvl64
Target Mask(OPT_VL64) Undocumented RejectNegative
mvliw
Target Mask(VLIW) Undocumented