URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.misc-tests/] [i386-prefetch.exp] - Rev 299
Compare with Previous | Blame | View Log
# Copyright (C) 2002, 2004, 2007, 2008 Free Software Foundation, Inc.# This program is free software; you can redistribute it and/or modify# it under the terms of the GNU General Public License as published by# the Free Software Foundation; either version 3 of the License, or# (at your option) any later version.## This program is distributed in the hope that it will be useful,# but WITHOUT ANY WARRANTY; without even the implied warranty of# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the# GNU General Public License for more details.## You should have received a copy of the GNU General Public License# along with GCC; see the file COPYING3. If not see# <http://www.gnu.org/licenses/>.# Test that the correct data prefetch instructions (SSE or 3DNow! variant,# or none) are used for various i386 cpu-type and instruction set# extension options for __builtin_prefetch. When using -mtune, specify# the minimum supported architecture in case the compiler was configured# with a different default.# Failure reports do not include the compile option that was used; that# information can be seen in the compile line in the log file.# Do not generate prefetch instructions for the following options.set PREFETCH_NONE [list \{ -march=i386 -mtune=i386 } \{ -march=i386 -mtune=i486 } \{ -march=i386 -mtune=i586 } \{ -march=i386 -mtune=i686 } \{ -march=i386 -mtune=pentium2 } \{ -march=i386 -mtune=k6 } \{ -march=i386 -mtune=k6-2 } \{ -march=i386 -mtune=k6-3 } \{ -march=i386 } \{ -march=i486 } \{ -march=i586 } \{ -march=i686 } \{ -march=pentium2 } \{ -march=k6 } ]# For options in PREFETCH_SSE, generate SSE prefetch instructions for# __builtin_prefetch. This includes -mtune for targets that treat prefetch# instructions as nops.set PREFETCH_SSE [list \{ -march=i686 -mtune=pentium3 } \{ -march=i686 -mtune=pentium3m } \{ -march=i686 -mtune=pentium-m } \{ -march=i686 -mtune=pentium4 } \{ -march=i686 -mtune=pentium4m } \{ -march=i686 -mtune=prescott } \{ -march=i686 -mtune=athlon } \{ -march=i686 -mtune=athlon-4 } \{ -march=i686 -mtune=c3-2 } \{ -march=pentium3 } \{ -march=pentium3m } \{ -march=pentium-m } \{ -march=pentium4 } \{ -march=pentium4m } \{ -march=prescott } \{ -march=c3-2 } ]# Generate 3DNow! prefetch instructions for the following.set PREFETCH_3DNOW [list \{ -march=c3 } \{ -march=k6-2 } \{ -march=k6-3 } ]# Athlon supports both 3DNow! and SSE prefetch instructions. For# __builtin_prefetch, generate the 3DNow! instruction for write# prefetches but SSE prefetch instructions for read prefetches.set PREFETCH_ATHLON [list \{ -march=athlon } \{ -march=athlon-4 } ]if $tracelevel then {strace $tracelevel}# Load support procs.load_lib gcc-dg.expload_lib torture-options.exp# Initialize harness.dg-inittorture-initif { [board_info target exists multilib_flags]&& [string match "* -march=*" " [board_info target multilib_flags] "] } {# Multilib flags come after the -march flags we pass and override# them, so skip these tests when such flags are passed.return}set-torture-options $PREFETCH_NONEgcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/i386-pf-none-*.c]] ""set-torture-options $PREFETCH_SSEgcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/i386-pf-sse-*.c]] ""set-torture-options $PREFETCH_3DNOWgcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/i386-pf-3dnow-*.c]] ""set-torture-options $PREFETCH_ATHLONgcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/i386-pf-athlon-*.c]] ""torture-finishdg-finish
