URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [arm/] [neon/] [vmovQ_ns32.c] - Rev 313
Compare with Previous | Blame | View Log
/* Test the `vmovQ_ns32' ARM Neon intrinsic. */ /* This file was autogenerated by neon-testgen. */ /* { dg-do assemble } */ /* { dg-require-effective-target arm_neon_ok } */ /* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */ #include "arm_neon.h" void test_vmovQ_ns32 (void) { int32x4_t out_int32x4_t; int32_t arg0_int32_t; out_int32x4_t = vmovq_n_s32 (arg0_int32_t); } /* { dg-final { scan-assembler "vdup\.32\[ \]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */