URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [arm/] [neon/] [vqshrn_nu16.c] - Rev 326
Go to most recent revision | Compare with Previous | Blame | View Log
/* Test the `vqshrn_nu16' ARM Neon intrinsic. */ /* This file was autogenerated by neon-testgen. */ /* { dg-do assemble } */ /* { dg-require-effective-target arm_neon_ok } */ /* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */ #include "arm_neon.h" void test_vqshrn_nu16 (void) { uint8x8_t out_uint8x8_t; uint16x8_t arg0_uint16x8_t; out_uint8x8_t = vqshrn_n_u16 (arg0_uint16x8_t, 1); } /* { dg-final { scan-assembler "vqshrn\.u16\[ \]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */
Go to most recent revision | Compare with Previous | Blame | View Log