OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [980709-1.c] - Rev 318

Compare with Previous | Blame | View Log

/* { dg-do compile } */
/* { dg-options -O2 } */
 
extern __inline__ int test_and_set_bit(int nr, volatile void * addr)
{
	int oldbit;
	__asm__ __volatile__( "" 
		"btsl %2,%1\n\tsbbl %0,%0"
		:"=r" (oldbit),"=m" (addr)
		:"ir" (nr));
	return oldbit;
}
struct buffer_head {
	unsigned long b_state;		 
};
extern void lock_buffer(struct buffer_head * bh)
{
	while (test_and_set_bit(2 , &bh->b_state))
		__wait_on_buffer(bh);
}
 

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.