OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [i386/] [sse4_1-pcmpeqq.c] - Rev 329

Go to most recent revision | Compare with Previous | Blame | View Log

/* { dg-do run } */
/* { dg-require-effective-target sse4 } */
/* { dg-options "-O2 -msse4.1" } */
 
#ifndef CHECK_H
#define CHECK_H "sse4_1-check.h"
#endif
 
#ifndef TEST
#define TEST sse4_1_test
#endif
 
#include CHECK_H
 
#include <smmintrin.h>
 
#define NUM 64
 
static void
TEST (void)
{
  union
    {
      __m128i x[NUM / 2];
      long long ll[NUM];
    } dst, src1, src2;
  int i, sign=1;
  long long is_eq;
 
  for (i = 0; i < NUM; i++)
    {
      src1.ll[i] = i * i * sign;
      src2.ll[i] = (i + 20) * sign;
      sign = -sign;
    }
 
  for (i = 0; i < NUM; i += 2)
    dst.x [i / 2] = _mm_cmpeq_epi64(src1.x [i / 2], src2.x [i / 2]);
 
  for (i = 0; i < NUM; i++)
    {
      is_eq = src1.ll[i] == src2.ll[i] ? 0xffffffffffffffffLL : 0LL;
      if (is_eq != dst.ll[i])
	abort ();
    }
}
 

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.