URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [mips/] [fpr-moves-1.c] - Rev 414
Go to most recent revision | Compare with Previous | Blame | View Log
/* { dg-options "-mabi=32 -mhard-float -mips1 -O2 -EL" } */ NOMIPS16 void foo (double d, double *x) { *x = d; } NOMIPS16 double bar (double d) { register double l1 asm ("$8") = d; register double l2 asm ("$f20") = 0.0; asm ("#foo" : "=d" (l1) : "d" (l1)); asm volatile ("#foo" :: "f" (l2)); return l1; } /* { dg-final { scan-assembler "\tswc1\t\\\$f12,0\\\(\\\$6\\\)\n" } } */ /* { dg-final { scan-assembler "\tswc1\t\\\$f13,4\\\(\\\$6\\\)\n" } } */ /* { dg-final { scan-assembler "\tmfc1\t\\\$8,\\\$f12\n" } } */ /* { dg-final { scan-assembler "\tmfc1\t\\\$9,\\\$f13\n" } } */ /* { dg-final { scan-assembler "\tmtc1\t\\\$0,\\\$f20\n" } } */ /* { dg-final { scan-assembler "\tmtc1\t\\\$0,\\\$f21\n" } } */ /* { dg-final { scan-assembler "\tmtc1\t\\\$8,\\\$f0\n" } } */ /* { dg-final { scan-assembler "\tmtc1\t\\\$9,\\\$f1\n" } } */
Go to most recent revision | Compare with Previous | Blame | View Log