URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [gdb/] [amd64-linux-nat.c] - Rev 294
Go to most recent revision | Compare with Previous | Blame | View Log
/* Native-dependent code for GNU/Linux x86-64. Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. Contributed by Jiri Smid, SuSE Labs. This file is part of GDB. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program. If not, see <http://www.gnu.org/licenses/>. */ #include "defs.h" #include "inferior.h" #include "gdbcore.h" #include "regcache.h" #include "linux-nat.h" #include "amd64-linux-tdep.h" #include "gdb_assert.h" #include "gdb_string.h" #include <sys/ptrace.h> #include <sys/debugreg.h> #include <sys/syscall.h> #include <sys/procfs.h> #include <asm/prctl.h> /* FIXME ezannoni-2003-07-09: we need <sys/reg.h> to be included after <asm/ptrace.h> because the latter redefines FS and GS for no apparent reason, and those definitions don't match the ones that libpthread_db uses, which come from <sys/reg.h>. */ /* ezannoni-2003-07-09: I think this is fixed. The extraneous defs have been removed from ptrace.h in the kernel. However, better safe than sorry. */ #include <asm/ptrace.h> #include <sys/reg.h> #include "gdb_proc_service.h" /* Prototypes for supply_gregset etc. */ #include "gregset.h" #include "amd64-tdep.h" #include "i386-linux-tdep.h" #include "amd64-nat.h" /* Mapping between the general-purpose registers in GNU/Linux x86-64 `struct user' format and GDB's register cache layout. */ static int amd64_linux_gregset64_reg_offset[] = { RAX * 8, RBX * 8, /* %rax, %rbx */ RCX * 8, RDX * 8, /* %rcx, %rdx */ RSI * 8, RDI * 8, /* %rsi, %rdi */ RBP * 8, RSP * 8, /* %rbp, %rsp */ R8 * 8, R9 * 8, /* %r8 ... */ R10 * 8, R11 * 8, R12 * 8, R13 * 8, R14 * 8, R15 * 8, /* ... %r15 */ RIP * 8, EFLAGS * 8, /* %rip, %eflags */ CS * 8, SS * 8, /* %cs, %ss */ DS * 8, ES * 8, /* %ds, %es */ FS * 8, GS * 8, /* %fs, %gs */ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, ORIG_RAX * 8 }; /* Mapping between the general-purpose registers in GNU/Linux x86-64 `struct user' format and GDB's register cache layout for GNU/Linux i386. Note that most GNU/Linux x86-64 registers are 64-bit, while the GNU/Linux i386 registers are all 32-bit, but since we're little-endian we get away with that. */ /* From <sys/reg.h> on GNU/Linux i386. */ static int amd64_linux_gregset32_reg_offset[] = { RAX * 8, RCX * 8, /* %eax, %ecx */ RDX * 8, RBX * 8, /* %edx, %ebx */ RSP * 8, RBP * 8, /* %esp, %ebp */ RSI * 8, RDI * 8, /* %esi, %edi */ RIP * 8, EFLAGS * 8, /* %eip, %eflags */ CS * 8, SS * 8, /* %cs, %ss */ DS * 8, ES * 8, /* %ds, %es */ FS * 8, GS * 8, /* %fs, %gs */ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, ORIG_RAX * 8 /* "orig_eax" */ }; /* Transfering the general-purpose registers between GDB, inferiors and core files. */ /* Fill GDB's register cache with the general-purpose register values in *GREGSETP. */ void supply_gregset (struct regcache *regcache, const elf_gregset_t *gregsetp) { amd64_supply_native_gregset (regcache, gregsetp, -1); } /* Fill register REGNUM (if it is a general-purpose register) in *GREGSETP with the value in GDB's register cache. If REGNUM is -1, do this for all registers. */ void fill_gregset (const struct regcache *regcache, elf_gregset_t *gregsetp, int regnum) { amd64_collect_native_gregset (regcache, gregsetp, regnum); } /* Transfering floating-point registers between GDB, inferiors and cores. */ /* Fill GDB's register cache with the floating-point and SSE register values in *FPREGSETP. */ void supply_fpregset (struct regcache *regcache, const elf_fpregset_t *fpregsetp) { amd64_supply_fxsave (regcache, -1, fpregsetp); } /* Fill register REGNUM (if it is a floating-point or SSE register) in *FPREGSETP with the value in GDB's register cache. If REGNUM is -1, do this for all registers. */ void fill_fpregset (const struct regcache *regcache, elf_fpregset_t *fpregsetp, int regnum) { amd64_collect_fxsave (regcache, regnum, fpregsetp); } /* Transferring arbitrary registers between GDB and inferior. */ /* Fetch register REGNUM from the child process. If REGNUM is -1, do this for all registers (including the floating point and SSE registers). */ static void amd64_linux_fetch_inferior_registers (struct regcache *regcache, int regnum) { struct gdbarch *gdbarch = get_regcache_arch (regcache); int tid; /* GNU/Linux LWP ID's are process ID's. */ tid = TIDGET (inferior_ptid); if (tid == 0) tid = PIDGET (inferior_ptid); /* Not a threaded program. */ if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum)) { elf_gregset_t regs; if (ptrace (PTRACE_GETREGS, tid, 0, (long) ®s) < 0) perror_with_name (_("Couldn't get registers")); amd64_supply_native_gregset (regcache, ®s, -1); if (regnum != -1) return; } if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum)) { elf_fpregset_t fpregs; if (ptrace (PTRACE_GETFPREGS, tid, 0, (long) &fpregs) < 0) perror_with_name (_("Couldn't get floating point status")); amd64_supply_fxsave (regcache, -1, &fpregs); } } /* Store register REGNUM back into the child process. If REGNUM is -1, do this for all registers (including the floating-point and SSE registers). */ static void amd64_linux_store_inferior_registers (struct regcache *regcache, int regnum) { struct gdbarch *gdbarch = get_regcache_arch (regcache); int tid; /* GNU/Linux LWP ID's are process ID's. */ tid = TIDGET (inferior_ptid); if (tid == 0) tid = PIDGET (inferior_ptid); /* Not a threaded program. */ if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum)) { elf_gregset_t regs; if (ptrace (PTRACE_GETREGS, tid, 0, (long) ®s) < 0) perror_with_name (_("Couldn't get registers")); amd64_collect_native_gregset (regcache, ®s, regnum); if (ptrace (PTRACE_SETREGS, tid, 0, (long) ®s) < 0) perror_with_name (_("Couldn't write registers")); if (regnum != -1) return; } if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum)) { elf_fpregset_t fpregs; if (ptrace (PTRACE_GETFPREGS, tid, 0, (long) &fpregs) < 0) perror_with_name (_("Couldn't get floating point status")); amd64_collect_fxsave (regcache, regnum, &fpregs); if (ptrace (PTRACE_SETFPREGS, tid, 0, (long) &fpregs) < 0) perror_with_name (_("Couldn't write floating point status")); return; } } /* Support for debug registers. */ static unsigned long amd64_linux_dr[DR_CONTROL + 1]; static unsigned long amd64_linux_dr_get (ptid_t ptid, int regnum) { int tid; unsigned long value; tid = TIDGET (ptid); if (tid == 0) tid = PIDGET (ptid); /* FIXME: kettenis/2001-03-27: Calling perror_with_name if the ptrace call fails breaks debugging remote targets. The correct way to fix this is to add the hardware breakpoint and watchpoint stuff to the target vector. For now, just return zero if the ptrace call fails. */ errno = 0; value = ptrace (PTRACE_PEEKUSER, tid, offsetof (struct user, u_debugreg[regnum]), 0); if (errno != 0) #if 0 perror_with_name (_("Couldn't read debug register")); #else return 0; #endif return value; } static void amd64_linux_dr_set (ptid_t ptid, int regnum, unsigned long value) { int tid; tid = TIDGET (ptid); if (tid == 0) tid = PIDGET (ptid); errno = 0; ptrace (PTRACE_POKEUSER, tid, offsetof (struct user, u_debugreg[regnum]), value); if (errno != 0) perror_with_name (_("Couldn't write debug register")); } void amd64_linux_dr_set_control (unsigned long control) { struct lwp_info *lp; ptid_t ptid; amd64_linux_dr[DR_CONTROL] = control; ALL_LWPS (lp, ptid) amd64_linux_dr_set (ptid, DR_CONTROL, control); } void amd64_linux_dr_set_addr (int regnum, CORE_ADDR addr) { struct lwp_info *lp; ptid_t ptid; gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR); amd64_linux_dr[DR_FIRSTADDR + regnum] = addr; ALL_LWPS (lp, ptid) amd64_linux_dr_set (ptid, DR_FIRSTADDR + regnum, addr); } void amd64_linux_dr_reset_addr (int regnum) { amd64_linux_dr_set_addr (regnum, 0); } unsigned long amd64_linux_dr_get_status (void) { return amd64_linux_dr_get (inferior_ptid, DR_STATUS); } static void amd64_linux_new_thread (ptid_t ptid) { int i; for (i = DR_FIRSTADDR; i <= DR_LASTADDR; i++) amd64_linux_dr_set (ptid, i, amd64_linux_dr[i]); amd64_linux_dr_set (ptid, DR_CONTROL, amd64_linux_dr[DR_CONTROL]); } /* This function is called by libthread_db as part of its handling of a request for a thread's local storage address. */ ps_err_e ps_get_thread_area (const struct ps_prochandle *ph, lwpid_t lwpid, int idx, void **base) { if (gdbarch_ptr_bit (current_gdbarch) == 32) { /* The full structure is found in <asm-i386/ldt.h>. The second integer is the LDT's base_address and that is used to locate the thread's local storage. See i386-linux-nat.c more info. */ unsigned int desc[4]; /* This code assumes that "int" is 32 bits and that GET_THREAD_AREA returns no more than 4 int values. */ gdb_assert (sizeof (int) == 4); #ifndef PTRACE_GET_THREAD_AREA #define PTRACE_GET_THREAD_AREA 25 #endif if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, (void *) (long) idx, (unsigned long) &desc) < 0) return PS_ERR; /* Extend the value to 64 bits. Here it's assumed that a "long" and a "void *" are the same. */ (*base) = (void *) (long) desc[1]; return PS_OK; } else { /* This definition comes from prctl.h, but some kernels may not have it. */ #ifndef PTRACE_ARCH_PRCTL #define PTRACE_ARCH_PRCTL 30 #endif /* FIXME: ezannoni-2003-07-09 see comment above about include file order. We could be getting bogus values for these two. */ gdb_assert (FS < ELF_NGREG); gdb_assert (GS < ELF_NGREG); switch (idx) { case FS: if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_FS) == 0) return PS_OK; break; case GS: if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_GS) == 0) return PS_OK; break; default: /* Should not happen. */ return PS_BADADDR; } } return PS_ERR; /* ptrace failed. */ } static void (*super_post_startup_inferior) (ptid_t ptid); static void amd64_linux_child_post_startup_inferior (ptid_t ptid) { i386_cleanup_dregs (); super_post_startup_inferior (ptid); } /* Provide a prototype to silence -Wmissing-prototypes. */ void _initialize_amd64_linux_nat (void); void _initialize_amd64_linux_nat (void) { struct target_ops *t; amd64_native_gregset32_reg_offset = amd64_linux_gregset32_reg_offset; amd64_native_gregset32_num_regs = I386_LINUX_NUM_REGS; amd64_native_gregset64_reg_offset = amd64_linux_gregset64_reg_offset; amd64_native_gregset64_num_regs = AMD64_LINUX_NUM_REGS; gdb_assert (ARRAY_SIZE (amd64_linux_gregset32_reg_offset) == amd64_native_gregset32_num_regs); gdb_assert (ARRAY_SIZE (amd64_linux_gregset64_reg_offset) == amd64_native_gregset64_num_regs); /* Fill in the generic GNU/Linux methods. */ t = linux_target (); /* Override the GNU/Linux inferior startup hook. */ super_post_startup_inferior = t->to_post_startup_inferior; t->to_post_startup_inferior = amd64_linux_child_post_startup_inferior; /* Add our register access methods. */ t->to_fetch_registers = amd64_linux_fetch_inferior_registers; t->to_store_registers = amd64_linux_store_inferior_registers; /* Register the target. */ linux_nat_add_target (t); linux_nat_set_new_thread (t, amd64_linux_new_thread); }
Go to most recent revision | Compare with Previous | Blame | View Log