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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [h8300/] [tconfig.in] - Rev 24
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/* h8300 target configuration file. */
/* Define this if the simulator supports profiling.
See the mips simulator for an example.
This enables the `-p foo' and `-s bar' options.
The target is required to provide sim_set_profile{,_size}. */
/* #define SIM_HAVE_PROFILE */
/* Define this if the simulator uses an instruction cache.
See the h8/300 simulator for an example.
This enables the `-c size' option to set the size of the cache.
The target is required to provide sim_set_simcache_size. */
#define SIM_HAVE_SIMCACHE
/* FIXME: This is a quick hack for run.c so it can support the `-h' option.
It will eventually be replaced by a more general facility. */
#define SIM_H8300
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