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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [m32r/] [Makefile.in] - Rev 359
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# Makefile template for Configure for the m32r simulator# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2003, 2004, 2007, 2008# Free Software Foundation, Inc.# Contributed by Cygnus Support.## This file is part of GDB, the GNU debugger.## This program is free software; you can redistribute it and/or modify# it under the terms of the GNU General Public License as published by# the Free Software Foundation; either version 3 of the License, or# (at your option) any later version.## This program is distributed in the hope that it will be useful,# but WITHOUT ANY WARRANTY; without even the implied warranty of# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the# GNU General Public License for more details.## You should have received a copy of the GNU General Public License# along with this program. If not, see <http://www.gnu.org/licenses/>.## COMMON_PRE_CONFIG_FRAGM32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.oM32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.oM32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.oTRAPS_OBJ = @traps_obj@CONFIG_DEVICES = dv-sockser.oCONFIG_DEVICES =SIM_OBJS = \$(SIM_NEW_COMMON_OBJS) \sim-cpu.o \sim-hload.o \sim-hrw.o \sim-model.o \sim-reg.o \cgen-utils.o cgen-trace.o cgen-scache.o \cgen-run.o sim-reason.o sim-engine.o sim-stop.o \sim-if.o arch.o \$(M32R_OBJS) \$(M32RX_OBJS) \$(M32R2_OBJS) \$(TRAPS_OBJ) \devices.o \$(CONFIG_DEVICES)# Extra headers included by sim-main.h.SIM_EXTRA_DEPS = \$(CGEN_INCLUDE_DEPS) \arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.hSIM_EXTRA_CFLAGS = @sim_extra_cflags@SIM_RUN_OBJS = nrun.oSIM_EXTRA_CLEAN = m32r-clean# This selects the m32r newlib/libgloss syscall definitions.NL_TARGET = -DNL_TARGET_m32r## COMMON_POST_CONFIG_FRAGarch = m32rsim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.harch.o: arch.c $(SIM_MAIN_DEPS)traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS)devices.o: devices.c $(SIM_MAIN_DEPS)# M32R objsM32RBF_INCLUDE_DEPS = \$(CGEN_MAIN_CPU_DEPS) \cpu.h decode.h eng.hm32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)# FIXME: Use of `mono' is wip.mloop.c eng.h: stamp-mloopstamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile$(SHELL) $(srccom)/genmloop.sh \-mono -fast -pbb -switch sem-switch.c \-cpu m32rbf -infile $(srcdir)/mloop.in$(SHELL) $(srcroot)/move-if-change eng.hin eng.h$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.ctouch stamp-mloopmloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)decode.o: decode.c $(M32RBF_INCLUDE_DEPS)sem.o: sem.c $(M32RBF_INCLUDE_DEPS)model.o: model.c $(M32RBF_INCLUDE_DEPS)# M32RX objsM32RXF_INCLUDE_DEPS = \$(CGEN_MAIN_CPU_DEPS) \cpux.h decodex.h engx.hm32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)# FIXME: Use of `mono' is wip.mloopx.c engx.h: stamp-xmloopstamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile$(SHELL) $(srccom)/genmloop.sh \-mono -no-fast -pbb -parallel-write -switch semx-switch.c \-cpu m32rxf -infile $(srcdir)/mloopx.in \-outfile-suffix x$(SHELL) $(srcroot)/move-if-change engx.hin engx.h$(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.ctouch stamp-xmloopmloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)semx.o: semx.c $(M32RXF_INCLUDE_DEPS)modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)# M32R2 objsM32R2F_INCLUDE_DEPS = \$(CGEN_MAIN_CPU_DEPS) \cpu2.h decode2.h eng2.hm32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)# FIXME: Use of `mono' is wip.mloop2.c eng2.h: stamp-2mloopstamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile$(SHELL) $(srccom)/genmloop.sh \-mono -no-fast -pbb -parallel-write -switch sem2-switch.c \-cpu m32r2f -infile $(srcdir)/mloop2.in \-outfile-suffix 2$(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h$(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.ctouch stamp-2mloopmloop2.o: mloop2.c sem2-switch.c $(M32R2F_INCLUDE_DEPS)cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)model2.o: model2.c $(M32R2F_INCLUDE_DEPS)m32r-clean:rm -f mloop.c eng.h stamp-mlooprm -f mloopx.c engx.h stamp-xmlooprm -f mloop2.c eng2.h stamp-2mlooprm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpurm -f tmp-*# cgen support, enable with --enable-cgen-maintCGEN_MAINT = ; @true# The following line is commented in or out depending upon --enable-cgen-maint.@CGEN_MAINT@CGEN_MAINT =stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/m32r.cpu$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \archfile=$(CGEN_CPU_DIR)/m32r.cpu \FLAGS="with-scache with-profile=fn"touch stamp-archarch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-archstamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \cpu=m32rbf mach=m32r SUFFIX= \archfile=$(CGEN_CPU_DIR)/m32r.cpu \FLAGS="with-scache with-profile=fn" \EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"touch stamp-cpucpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpustamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \cpu=m32rxf mach=m32rx SUFFIX=x \archfile=$(CGEN_CPU_DIR)/m32r.cpu \FLAGS="with-scache with-profile=fn" \EXTRAFILES="$(CGEN_CPU_SEMSW)"touch stamp-xcpucpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpustamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \cpu=m32r2f mach=m32r2 SUFFIX=2 \archfile=$(CGEN_CPU_DIR)/m32r.cpu \FLAGS="with-scache with-profile=fn" \EXTRAFILES="$(CGEN_CPU_SEMSW)"touch stamp-2cpucpu2.h sem2-switch.c model2.c decode2.c decode2.h: $(CGEN_MAINT) stamp-2cpu
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