OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [d10v-elf/] [t-sadd.s] - Rev 437

Go to most recent revision | Compare with Previous | Blame | View Log

.include "t-macros.i"
 
	start
 
	PSW_BITS = PSW_FX|PSW_ST|PSW_SM
        loadpsw2 PSW_BITS
 
 ;; Test normal sadd
 
        loadacc2 a0 0x00 0x7fff 0xffff
        loadacc2 a1 0xff 0x8000 0x0000
        sadd a1, a0
        checkacc2 1 a0 0x00 0x7fff 0xffff
        checkacc2 2 a1 0xff 0x8000 0x7fff
 
 ;; Test overflow 
 
        loadacc2 a0 0x00 0x0000 0x0000
        loadacc2 a1 0x01 0x8000 0x0000
        sadd a1, a0
        checkacc2 3 a0 0x00 0x0000 0x0000
        checkacc2 4 a1 0x00 0x7fff 0xffff
 
        loadacc2 a0 0x00 0xffff 0xffff
        loadacc2 a1 0x00 0xffff 0xffff
        sadd a1, a0
        checkacc2 5 a1 0x00 0x7fff 0xffff
        checkacc2 6 a0 0x00 0xffff 0xffff
 
 ;; Test underflow
 
        loadacc2 a0 0x00 0x0000 0x0000
        loadacc2 a1 0x80 0x8000 0x0000
        sadd a1, a0
        checkacc2 7 a0 0x00 0x0000 0x0000
        checkacc2 8 a1 0xff 0x8000 0x0000
 
	exit0
 

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.