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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
Subversion Repositories openrisc_2011-10-31
[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [arm/] [rsc.cgs] - Rev 447
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# arm testcase for rsc$cond${set-cc?} $rd,$rn,$imm12
# mach: unfinished
.include "testutils.inc"
start
.global rsc_imm
rsc_imm:
rsc00 pc,pc,0
pass
# arm testcase for rsc$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftimm}
# mach: unfinished
.include "testutils.inc"
start
.global rsc_reg_imm_shift
rsc_reg_imm_shift:
rsc00 pc,pc,pc,lsl 0
pass
# arm testcase for rsc$cond${set-cc?} $rd,$rn,$rm,${operand2-shifttype} ${operand2-shiftreg}
# mach: unfinished
.include "testutils.inc"
start
.global rsc_reg_reg_shift
rsc_reg_reg_shift:
rsc00 pc,pc,pc,lsl pc
pass
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