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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [break.cgs] - Rev 272

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# FRV testcase for break
# mach: all

        .include "testutils.inc"

        start

        .global tra
tra:
        ; Can't test break anymore in the user environment because it is the 
        ; debugger's breakpoint insn. Just pass this test for now.
        pass





        set_gr_spr      tbr,gr7
        and_gr_immed    -4081,gr7               ; clear tbr.tt
        inc_gr_immed    0xff0,gr7               ; break handler
        set_bctrlr_0_0  gr7
        set_spr_immed   128,lcr

        test_spr_bits   0x4,2,0x1,psr           ; psr.s is set
        test_spr_bits   0x1,0,0x0,psr           ; psr.et is clear
        set_spr_addr    ok1,lr
        break
ret:
        or_spr_immed    0x00000001,psr          ; turn on psr.et
        and_spr_immed   0xfffffffb,psr          ; turn off psr.s
        test_spr_bits   0x4,2,0x0,psr           ; psr.s is clear
        test_spr_bits   0x1,0,0x1,psr           ; psr.et is set
        set_spr_addr    ok0,lr
        break
ret1:
        test_spr_bits   0x4,2,0x0,psr           ; psr.s is clear
        test_spr_bits   0x1,0,0x1,psr           ; psr.et is set
        pass

        ; check interrupt for second break
ok0:    test_spr_addr   ret1,bpcsr
        test_spr_bits   0x1000,12,0x0,bpsr      ; bpsr.bs is clear
        test_spr_bits   0x0001,0,0x1,bpsr       ; bpsr.et is set
        test_spr_bits   0x4,2,0x1,psr           ; psr.s is set
        test_spr_bits   0x1,0,0x0,psr           ; psr.et is clear
        rett            0                        ; nop
        rett            1

        ; check interrupt for first break
ok1:    test_spr_addr   ret,bpcsr
        test_spr_bits   0x1000,12,0x1,bpsr      ; bpsr.bs is set
        test_spr_bits   0x0001,0,0x0,bpsr       ; bpsr.et is clear
        test_spr_bits   0x4,2,0x1,psr           ; psr.s is set
        test_spr_bits   0x1,0,0x0,psr           ; psr.et is clear
        rett            0                        ; nop
        rett            1

        

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