URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [lddcu.cgs] - Rev 272

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# frv testcase for lddcu @($GRi,$GRj),$GRk
# mach: frv
# as(frv): -mcpu=frv

        .include "testutils.inc"

        start

        .global lddcu
lddcu:
        set_mem_limmed  0xdead,0xbeef,sp
        inc_gr_immed    -4,sp
        set_mem_limmed  0xbeef,0xdead,sp
        set_gr_gr       sp,gr20
        set_cpr_limmed  0xdead,0xbeef,cpr8
        set_cpr_limmed  0xbeef,0xdead,cpr9

        set_gr_immed    0,gr7
        lddcu           @(sp,gr7),cpr8
        test_cpr_limmed 0xbeef,0xdead,cpr8
        test_cpr_limmed 0xdead,0xbeef,cpr9
        test_gr_gr      sp,gr20

        set_cpr_limmed  0xdead,0xbeef,cpr8
        set_cpr_limmed  0xbeef,0xdead,cpr9
        inc_gr_immed    -8,sp
        set_gr_immed    8,gr7
        lddcu           @(sp,gr7),cpr8
        test_cpr_limmed 0xbeef,0xdead,cpr8
        test_cpr_limmed 0xdead,0xbeef,cpr9
        test_gr_gr      sp,gr20

        set_cpr_limmed  0xdead,0xbeef,cpr8
        set_cpr_limmed  0xbeef,0xdead,cpr9
        inc_gr_immed    8,sp
        set_gr_immed    -8,gr7
        lddcu           @(sp,gr7),cpr8
        test_cpr_limmed 0xbeef,0xdead,cpr8
        test_cpr_limmed 0xdead,0xbeef,cpr9
        test_gr_gr      sp,gr20

        pass

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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [lddcu.cgs] - Rev 272