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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [nfsubs.cgs] - Rev 24
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# frv testcase for nfsubs $FRi,$FRj,$FRk# mach: fr500 fr550 frv.include "testutils.inc"float_constantsstartload_float_constants.global nfsubsnfsubs:nfsubs fr0,fr16,fr1test_fr_fr fr1,fr0test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr4,fr16,fr1test_fr_fr fr1,fr4test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr8,fr16,fr1test_fr_fr fr1,fr8test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr12,fr16,fr1test_fr_fr fr1,fr12test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr16,fr16,fr1test_fr_fr fr1,fr16test_fr_fr fr1,fr20test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr20,fr16,fr1test_fr_fr fr1,fr16test_fr_fr fr1,fr20test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr24,fr16,fr1test_fr_fr fr1,fr24test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr28,fr16,fr1test_fr_fr fr1,fr28test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr32,fr16,fr1test_fr_fr fr1,fr32test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr36,fr16,fr1test_fr_fr fr1,fr36test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr40,fr16,fr1test_fr_fr fr1,fr40test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr44,fr16,fr1test_fr_fr fr1,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr48,fr16,fr1test_fr_fr fr1,fr48test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr52,fr16,fr1test_fr_fr fr1,fr52test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr0,fr20,fr1test_fr_fr fr1,fr0test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr4,fr20,fr1test_fr_fr fr1,fr4test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr8,fr20,fr1test_fr_fr fr1,fr8test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr12,fr20,fr1test_fr_fr fr1,fr12test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr16,fr20,fr1test_fr_fr fr1,fr16test_fr_fr fr1,fr20test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr20,fr20,fr1test_fr_fr fr1,fr16test_fr_fr fr1,fr20test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr24,fr20,fr1test_fr_fr fr1,fr24test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr28,fr20,fr1test_fr_fr fr1,fr28test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr32,fr20,fr1test_fr_fr fr1,fr32test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr36,fr20,fr1test_fr_fr fr1,fr36test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr40,fr20,fr1test_fr_fr fr1,fr40test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr44,fr20,fr1test_fr_fr fr1,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr48,fr20,fr1test_fr_fr fr1,fr48test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr52,fr20,fr1test_fr_fr fr1,fr52test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr32,fr36,fr1test_fr_fr fr1,fr8test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr44,fr40,fr1test_fr_fr fr1,fr36test_spr_immed 0,fner1test_spr_immed 0,fner0; try to cause exceptionsnfsubs fr4,fr28,fr1; test_fr_fr fr1,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr0,fr28,fr1; test_fr_fr fr1,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr56,fr28,fr1; test_fr_fr fr1,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0nfsubs fr60,fr28,fr1; test_fr_fr fr1,fr44test_spr_immed 2,fner1test_spr_immed 0,fner0pass
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