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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [tra.cgs] - Rev 407
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# frv testcase for tra $GRi,$GRj
# mach: all
.include "testutils.inc"
start
.global tra
tra:
and_spr_immed -4081,tbr ; clear tbr.tt
set_gr_spr tbr,gr7
inc_gr_immed 2112,gr7 ; address of exception handler
set_bctrlr_0_0 gr7
set_spr_immed 128,lcr
set_gr_immed 0,gr7
set_gr_immed 4,gr8
set_psr_et 1
set_spr_addr ok0,lr
set_icc 0x0 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
bad0:
fail
ok0:
test_spr_addr bad0,pcsr
set_psr_et 1
set_spr_addr ok1,lr
set_icc 0x1 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok1:
set_psr_et 1
set_spr_addr ok2,lr
set_icc 0x2 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok2:
set_psr_et 1
set_spr_addr ok3,lr
set_icc 0x3 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok3:
set_psr_et 1
set_spr_addr ok4,lr
set_icc 0x4 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok4:
set_psr_et 1
set_spr_addr ok5,lr
set_icc 0x5 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok5:
set_psr_et 1
set_spr_addr ok6,lr
set_icc 0x6 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok6:
set_psr_et 1
set_spr_addr ok7,lr
set_icc 0x7 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok7:
set_psr_et 1
set_spr_addr ok8,lr
set_icc 0x8 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok8:
set_psr_et 1
set_spr_addr ok9,lr
set_icc 0x9 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
ok9:
set_psr_et 1
set_spr_addr oka,lr
set_icc 0xa 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
oka:
set_psr_et 1
set_spr_addr okb,lr
set_icc 0xb 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
okb:
set_psr_et 1
set_spr_addr okc,lr
set_icc 0xc 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
okc:
set_psr_et 1
set_spr_addr okd,lr
set_icc 0xd 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
okd:
set_psr_et 1
set_spr_addr oke,lr
set_icc 0xe 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
oke:
set_psr_et 1
set_spr_addr okf,lr
set_icc 0xf 0
tra gr7,gr8 ; should branch to tbr + (128 + 4)*16
fail
okf:
pass
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