OpenCores

URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [m32r/] [and.cgs] - Rev 272

Go to most recent revision | Compare with Previous | Blame | View Log

# m32r testcase for and $dr,$sr
# mach(): m32r m32rx

        .include "testutils.inc"

        start

        .global and
and:
        mvi_h_gr r4, 3
        mvi_h_gr r5, 6

        and r4, r5

        test_h_gr r4, 2

        pass

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.