OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [m32r/] [bltz.cgs] - Rev 336

Go to most recent revision | Compare with Previous | Blame | View Log

# m32r testcase for bltz $src2,$disp16
# mach(): m32r m32rx

        .include "testutils.inc"

        start

        .global bltz
bltz:
        mvi_h_gr r4, -1
        bltz r4, test0pass
test1fail:
        fail

test0pass:
        mvi_h_gr r4, 0
        bltz r4, test1fail

        pass

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.