OpenCores

URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [m32r/] [sra3.cgs] - Rev 225

Go to most recent revision | Compare with Previous | Blame | View Log

# m32r testcase for sra3 $dr,$sr,#$simm16
# mach(): m32r m32rx

        .include "testutils.inc"

        start

        .global sra3
sra3:

        mvi_h_gr  r4, 0
        mvi_h_gr  r5, 0xf0f0f0ff
        sra3      r4, r5, #4
        test_h_gr r4, 0xff0f0f0f

        pass

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.