OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [m32r/] [st-plus.cgs] - Rev 272

Go to most recent revision | Compare with Previous | Blame | View Log

# m32r testcase for st $src1,@+$src2
# mach(): m32r m32rx

        .include "testutils.inc"

        start

        .global st_plus
st_plus:
        mvaddr_h_gr r4, data_loc
        mvi_h_gr    r5, 1

        st r5, @+r4

        mvaddr_h_gr r5, data_loc2

        bne r4, r5, not_ok
        ld r4, @r4
        test_h_gr r4, 1

        pass
not_ok:
        fail

data_loc:
        .word 0
data_loc2:
        .word 0

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.