OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh64/] [compact/] [fmac.cgs] - Rev 157

Compare with Previous | Blame | View Log

# sh testcase for fmac -*- Asm -*-
# mach: all
# as: -isa=shcompact
# ld: -m shelf32

        .include "compact/testutils.inc"

        start

        # 0.0 * x + y = y.

        fldi0 fr0
        fldi1 fr1
        fldi1 fr2
        fmac fr0, fr1, fr2
        # check result.
        fldi1 fr0
        fcmp/eq fr0, fr2
        bf wrong

        # x * y + 0.0 = x * y.

        fldi1 fr0
        fldi1 fr1
        fldi0 fr2
        # double it.
        fadd fr1, fr2
        fmac fr0, fr1, fr2
        # check result.
        fldi1 fr0
        fadd fr0, fr0
        fcmp/eq fr0, fr2
        bf wrong
        
        # x * 0.0 + y = y.

        fldi1 fr0
        fldi0 fr1
        fldi1 fr2
        fadd fr2, fr2
        fmac fr0, fr1, fr2
        # check result.
        fldi1 fr0
        # double fr0.
        fadd fr0, fr0
        fcmp/eq fr0, fr2
        bf wrong

        # x * 0.0 + 0.0 = 0.0

        fldi1 fr0
        fadd fr0, fr0
        fldi0 fr1
        fldi0 fr2
        fmac fr0, fr1, fr2
        # check result.
        fldi0 fr0
        fcmp/eq fr0, fr2
        bf wrong

        # 0.0 * x + 0.0 = 0.0.

        fldi0 fr0
        fldi1 fr1
        # double it.
        fadd fr1, fr1
        fldi0 fr2
        fmac fr0, fr1, fr2
        # check result.
        fldi0 fr0
        fcmp/eq fr0, fr2
        bf wrong

okay:
        pass

wrong:
        fail

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.