URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [sh64/] [compact/] [fsub.cgs] - Rev 157
Compare with Previous | Blame | View Log
# sh testcase for fmul -*- Asm -*-# mach: all# as: -isa=shcompact# ld: -m shelf32.include "compact/testutils.inc"start# 0.0 - 0.0 = 0.0.fldi0 fr0fldi0 fr1fsub fr0, fr1fldi0 fr2fcmp/eq fr1, fr2bf wrong# 1.0 - 0.0 = 1.0.fldi0 fr0fldi1 fr1fsub fr0, fr1fldi1 fr2fcmp/eq fr1, fr2bf wrong# 1.0 - 1.0 = 0.0.fldi1 fr0fldi1 fr1fsub fr0, fr1fldi0 fr2fcmp/eq fr1, fr2bf wrong# 0.0 - 1.0 = -1.0.fldi1 fr0fldi0 fr1fsub fr0, fr1fldi1 fr2fneg fr2fcmp/eq fr1, fr2bf wrongbra doublenopwrong:faildouble:# 0.0 - 0.0 = 0.0.fldi0 fr0fldi0 fr2_s2d fr0, dr0_s2d fr2, dr2_setprfsub dr0, dr2_clrprfldi0 fr4_s2d fr4, dr4_setprfcmp/eq dr2, dr4bf wrong_clrpronezero:# 1.0 - 0.0 = 1.0.fldi0 fr0fldi1 fr2_s2d fr0, dr0_s2d fr2, dr2_setprfsub dr0, dr2_clrprfldi1 fr4_s2d fr4, dr4_setprfcmp/eq dr2, dr4bf wrong2_clrproneone:# 1.0 - 1.0 = 0.0.fldi1 fr0fldi1 fr2_s2d fr0, dr0_s2d fr2, dr2_setprfsub dr0, dr2_clrprfldi0 fr4_s2d fr4, dr4_setprfcmp/eq dr2, dr4bf wrong2_clrprbra zeroonenopwrong2:failzeroone:# 0.0 - 1.0 = -1.0.fldi1 fr0fldi0 fr2_s2d fr0, dr0_s2d fr2, dr2_setprfsub dr0, dr2_clrprfldi1 fr4fneg fr4_s2d fr4, dr4_setprfcmp/eq dr2, dr4bf wrong2_clrprokay:pass