OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [gdb/] [testsuite/] [gdb.reverse/] [i387-env-reverse.exp] - Rev 387

Go to most recent revision | Compare with Previous | Blame | View Log

# Copyright 2009, 2010 Free Software Foundation, Inc.

# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program.  If not, see <http://www.gnu.org/licenses/>.

# This file is part of the gdb testsuite.

if $tracelevel {
    strace $tracelevel
}

set prms_id 0
set bug_id 0

if ![istarget "i?86-*linux*"] then {
    verbose "Skipping i387 reverse float tests."
    return
}

set testfile "i387-env-reverse"
set srcfile ${testfile}.c
set binfile ${objdir}/${subdir}/${testfile}

# some targets have leading underscores on assembly symbols.
# TODO: detect this automatically
set additional_flags ""
if [istarget "i?86-*-cygwin*"] then {
  set additional_flags "additional_flags=-DSYMBOL_PREFIX=\"_\""
}

if { [gdb_compile "${srcdir}/${subdir}/${srcfile}" "${binfile}" executable [list debug $additional_flags]] != "" } {
    untested i387-float-reverse
    return -1
}

# Get things started.

gdb_exit
gdb_start
gdb_reinitialize_dir $srcdir/$subdir
gdb_load ${binfile}
runto main

# Record to end of main

set location [gdb_get_line_number "END I387-FLOAT-REVERSE"]
gdb_test "record" "" "Turn on process record"
gdb_test "until $location" ".*/$srcfile:$location.*" \
    "record to end of main"

# Now rewind to beginning so we can begin testing.

set location [gdb_get_line_number "BEGIN I387-FLOAT-REVERSE"]
gdb_test "set exec-dir reverse" "" "set reverse direction"
gdb_test "until $location" ".*/$srcfile:$location.*" \
    "rewind to beginning of main"
gdb_test "set exec-dir forward" "" "set forward direction"

# Test FPU env particularly ftag and fstatus reigters.

set location [gdb_get_line_number "TEST ENV"]
gdb_test "until $location" ".*/$srcfile:$location.*asm.*nop.*" \
    "begin testing fpu env"       

gdb_test "n" "asm.*fsave.*"               "save FPU env in memory"    
gdb_test "n" "asm.*frstor.*"              "restore FPU env"
gdb_test "n" "asm.*fstsw.*"               "store status word in EAX"
gdb_test "n" "asm.*fld1.*"                "push st0"

gdb_test "info register eax" "eax *0x8040000.*\t.*"  "verify eax == 0x8040000"
gdb_test "info register fstat" "fstat *0.*\t.*"      "verify fstat == 0"
gdb_test "info register ftag" "ftag *0xffff.*\t.*"   "verify ftag == 0xffff"

gdb_test "stepi" "asm.*fldl2t.*"                      "push st0"
gdb_test "info register fstat" "fstat *0x3800.*\t.*"  "verify fstat == 0x3800"
gdb_test "info register ftag" "ftag *0x3fff.*\t.*"    "verify ftag  == 0x3fff"

gdb_test "stepi" "asm.*fldl2e.*"                  "push st0"
gdb_test "info register fstat" "fstat *0x3000.*\t.*"  "verify fstat == 0x3000"
gdb_test "info register ftag" "ftag *0xfff.*\t.*"     "verify ftag  == 0xfff"

gdb_test "stepi" "asm.*fldpi.*"                   "push st0"
gdb_test "info register fstat" "fstat *0x2800.*\t.*"  "verify fstat == 0x2800"
gdb_test "info register ftag" "ftag *0x3ff.*\t.*"     "verify ftag  == 0x3ff"

gdb_test "stepi" "asm.*fldlg2.*"                  "push st0"
gdb_test "info register fstat" "fstat *0x2000.*\t.*"  "verify fstat == 0x2000"
gdb_test "info register ftag" "ftag *0xff.*\t.*"      "verify ftag  == 0xff"

gdb_test "stepi" "asm.*fldln2.*"                  "push st0"
gdb_test "info register fstat" "fstat *0x1800.*\t.*"  "verify fstat == 0x1800"
gdb_test "info register ftag" "ftag *0x3f.*\t.*"      "verify ftag  == 0x3f"

gdb_test "stepi" "asm.*fldz.*"                    "push st0"
gdb_test "info register fstat" "fstat *0x1000.*\t.*"  "verify fstat == 0x1000"
gdb_test "info register ftag" "ftag *0xf.*\t.*"       "verify ftag  == 0xf"

gdb_test "stepi" "asm.*nop.*"                    "push st0"
gdb_test "info register fstat" "fstat *0x800.*\t.*"  "verify fstat == 0x800"
gdb_test "info register ftag" "ftag *0x7.*\t.*"      "verify ftag  == 0x7"


# move backward and ehck we get the same registers back.

gdb_test "reverse-stepi" "asm.*fldz.*"           "push st0"
gdb_test "info register fstat" "fstat *0x1000.*\t.*" "verify fstat == 0x1000"
gdb_test "info register ftag" "ftag *0xf.*\t.*"      "verify ftag  == 0xf"

gdb_test "reverse-stepi" "asm.*fldln2.*"          "push st0"
gdb_test "info register fstat" "fstat *0x1800.*\t.*"  "verify fstat == 0x1800"
gdb_test "info register ftag" "ftag *0x3f.*\t.*"      "verify ftag  == 0x3f"

gdb_test "reverse-stepi" "asm.*fldlg2.*"          "push st0"
gdb_test "info register fstat" "fstat *0x2000.*\t.*"  "verify fstat == 0x2000"
gdb_test "info register ftag" "ftag *0xff.*\t.*"      "verify ftag  == 0xff"

gdb_test "reverse-stepi" "asm.*fldpi.*"          "push st0"
gdb_test "info register fstat" "fstat *0x2800.*\t.*" "verify fstat == 0x2800"
gdb_test "info register ftag" "ftag *0x3ff.*\t.*"    "verify ftag  == 0x3ff"

gdb_test "reverse-stepi" "asm.*fldl2e.*"          "push st0"
gdb_test "info register fstat" "fstat *0x3000.*\t.*"  "verify fstat == 0x3000"
gdb_test "info register ftag" "ftag *0xfff.*\t.*"     "verify ftag  == 0xfff"

gdb_test "reverse-stepi" "asm.*fldl2t.*"          "push st0"
gdb_test "info register fstat" "fstat *0x3800.*\t.*"  "verify fstat == 0x3800"
gdb_test "info register ftag" "ftag *0x3fff.*\t.*"    "verify ftag  == 0x3fff"

gdb_test "reverse-stepi" "asm.*fld1.*"            "push st0"
gdb_test "info register fstat" "fstat *0.*\t.*"       "verify fstat == 0"
gdb_test "info register ftag" "ftag *0xffff.*\t.*"    "verify ftag == 0xffff"






Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.