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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [or32/] [tconfig.in] - Rev 318
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/* Default target configuration file.
To override this, create file `tconfig.in' in the simulator's
source directory. */
/* Define this if the simulator supports profiling.
See the mips simulator for an example.
This enables the `-p foo' and `-s bar' options.
The target is required to provide sim_set_profile{,_size}. */
/* #define SIM_HAVE_PROFILE */
/* Define this if the simulator uses an instruction cache.
See the h8/300 simulator for an example.
This enables the `-c size' option to set the size of the cache.
The target is required to provide sim_set_simcache_size. */
/* #define SIM_HAVE_SIMCACHE */
/* Define this if the target cpu is bi-endian
and the simulator supports it. */
/* #define SIM_HAVE_BIENDIAN */
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