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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [arm/] [iwmmxt/] [wacc.cgs] - Rev 227
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# Intel(r) Wireless MMX(tm) technology testcase for WACC# mach: xscale# as: -mcpu=xscale+iwmmxt.include "testutils.inc"start.global waccwacc:# Enable access to CoProcessors 0 & 1 before# we attempt these instructions.mvi_h_gr r1, 3mcr p15, 0, r1, cr15, cr1, 0# Test Unsigned Byte Wide Accumulationmvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0mvi_h_gr r3, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3waccb wr1, wr0tmrrc r0, r1, wr0tmrrc r2, r3, wr1test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x00000438test_h_gr r3, 0x00000000# Test Unsigned Half Word Wide Accumulationmvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0mvi_h_gr r3, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3wacch wr1, wr0tmrrc r0, r1, wr0tmrrc r2, r3, wr1test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x0001e258test_h_gr r3, 0x00000000# Test Unsigned Word Wide Accumulationmvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0mvi_h_gr r3, 0tmcrr wr0, r0, r1tmcrr wr1, r2, r3waccw wr1, wr0tmrrc r0, r1, wr0tmrrc r2, r3, wr1test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0xacf13568test_h_gr r3, 0x00000000pass