OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [m32r/] [allinsn.exp] - Rev 227

Compare with Previous | Blame | View Log

# M32R simulator testsuite.

if [istarget m32r*-*-*] {
    # load support procs
    # load_lib cgen.exp

    # all machines
    set all_machs "m32r"


    # The .cgs suffix is for "cgen .s".
    foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.cgs]] {
        # If we're only testing specific files and this isn't one of them,
        # skip it.
        if ![runtest_file_p $runtests $src] {
            continue
        }

        run_sim_test $src $all_machs
    }
}

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.