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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [sim/] [testsuite/] [sim/] [m32r/] [cmpu.cgs] - Rev 227

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# m32r testcase for cmpu $src1,$src2
# mach(): m32r m32rx

        .include "testutils.inc"

        start

        .global cmpu
cmpu:
        mvi_h_condbit 0
        mvi_h_gr r4, 1
        mvi_h_gr r5, -2
        cmpu r4, r5
        bc ok
not_ok:
        fail
ok:
        mvi_h_condbit 1
        mvi_h_gr r4, -1
        cmpu r4, r5
        bc not_ok

        pass

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