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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [arm/] [iwmmxt/] [textrm.cgs] - Rev 330
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# Intel(r) Wireless MMX(tm) technology testcase for TEXTRM# mach: xscale# as: -mcpu=xscale+iwmmxt.include "testutils.inc"start.global textrmtextrm:# Enable access to CoProcessors 0 & 1 before# we attempt these instructions.mvi_h_gr r1, 3mcr p15, 0, r1, cr15, cr1, 0# Test Unsigned Byte Wide Extractionmvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0x111111fftmcrr wr0, r0, r1textrmub r2, wr0, #3tmrrc r0, r1, wr0test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x00000012# Test Signed Byte Wide Extractionmvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0x111111fftmcrr wr0, r0, r1textrmsb r2, wr0, #4tmrrc r0, r1, wr0test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0xfffffff0# Test Unsigned Half Word Wide Extractionmvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0x111111fftmcrr wr0, r0, r1textrmuh r2, wr0, #3tmrrc r0, r1, wr0test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x00009abc# Test Signed Half Word Wide Extractionmvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0x111111fftmcrr wr0, r0, r1textrmsh r2, wr0, #1tmrrc r0, r1, wr0test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x00001234# Test Unsigned Word Wide Extractionmvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0x111111fftmcrr wr0, r0, r1textrmuw r2, wr0, #0tmrrc r0, r1, wr0test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x12345678# Test Signed Word Wide Extractionmvi_h_gr r0, 0x12345678mvi_h_gr r1, 0x9abcdef0mvi_h_gr r2, 0x111111fftmcrr wr0, r0, r1textrmsw r2, wr0, #1tmrrc r0, r1, wr0test_h_gr r0, 0x12345678test_h_gr r1, 0x9abcdef0test_h_gr r2, 0x9abcdef0pass