URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [cr16/] [loadw.cgs] - Rev 330
Compare with Previous | Blame | View Log
# cr16 testcase for loadw 0(regp), (regp)
# mach(): cr16
.include "testutils.inc"
start
.global ldb
ldb:
movd $data_loc, (r4,r3)
movw $0,r5
loadw 0(r4,r3),r5
test_h_gr r5, 0x5678 # little endian processor
pass
data_loc:
.word 0x5678