OpenCores

URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [m32r/] [cmpui.cgs] - Rev 438

Go to most recent revision | Compare with Previous | Blame | View Log

# m32r testcase for cmpui $src2,#$simm16
# mach(): m32r m32rx

        .include "testutils.inc"

        start

        .global cmpui
cmpui:
        mvi_h_condbit 0
        mvi_h_gr r4, 1
        cmpui r4, #2
        bc ok
not_ok:
        fail
ok:
        mvi_h_condbit 1
        mvi_h_gr r4, -1
        cmpui r4, #2
        bc not_ok

        pass

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.