OpenCores

URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [m32r/] [ld24.cgs] - Rev 330

Compare with Previous | Blame | View Log

# m32r testcase for ld24 $dr,#$uimm24
# mach(): m32r m32rx

        .include "testutils.inc"

        start

        .global ld24
ld24:
        ld24 r4, #0x123456

        test_h_gr r4, 0x123456

        pass

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.