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[/] [openrisc/] [trunk/] [gnu-src/] [newlib-1.18.0/] [newlib/] [libm/] [machine/] [spu/] [headers/] [isnand2.h] - Rev 207

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/* --------------------------------------------------------------  */
/* (C)Copyright 2006,2008,                                         */
/* International Business Machines Corporation                     */
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/* PROLOG END TAG zYx                                              */
#ifdef __SPU__
#ifndef _ISNAND2_H_
#define _ISNAND2_H_	1
 
#include <spu_intrinsics.h>
 
/*
 * FUNCTION
 *	vector unsigned long long _isnand2(vector double x)
 *
 * DESCRIPTION
 *      The _isnand2 function returns a vector in which each element indicates
 *      if the corresponding element of x is not a number.  (NaN)  
 *
 * RETURNS
 *      The function _isnand2 returns an unsigned long long vector in which 
 *      each element is defined as:
 *
 *        - ULLONG_MAX  if the element of x is NaN
 *        - 0           otherwise
 *
 */
static __inline vector unsigned long long _isnand2(vector double x)
{
 
#ifndef __SPU_EDP__
 
  vec_uint4 sign_mask = (vec_uint4) { 0x7FFFFFFF, 0xFFFFFFFF, 0x7FFFFFFF, 0xFFFFFFFF };
  vec_uint4 test_mask = (vec_uint4) { 0x7FF00000, 0x00000000, 0x7FF00000, 0x00000000 };
  vec_uchar16 hi_promote = (vec_uchar16) { 0, 1, 2, 3, 0, 1, 2, 3, 8, 9, 10, 11, 8, 9, 10, 11 };
 
  //  Remove the sign bits
  vec_uint4 signless = spu_and((vec_uint4)x,sign_mask);
 
  //  Check if the high word is equal to the max_exp
  vec_uint4 x2 = spu_cmpeq(signless,test_mask);
 
  //  This checks two things:
  //  1)  If the high word is greater than max_exp (indicates a NaN)
  //  2)  If the low word is non-zero (indicates a NaN in conjunction with an
  //      exp equal to max_exp)
  vec_uint4 x1 = spu_cmpgt(signless,test_mask);
 
  //  rotate the low word test of x1 into the high word slot, then and it
  //  with the high word of x2 (checking for #2 above)
  vec_uint4 exp_and_lw = spu_and(spu_rlqwbyte(x1,4),x2);
 
  //  All the goodies are in the high words, so if the high word of either x1
  //  or exp_and_lw is set, then we have a NaN, so we "or" them together
  vec_uint4 result = spu_or(x1,exp_and_lw);
 
  //  And then promote the resulting high word to 64 bit length
  result = spu_shuffle(result,result,hi_promote);
 
  return (vec_ullong2) result;	
 
#else
 
  return spu_testsv(x, SPU_SV_NAN);
 
#endif /* __SPU_EDP__ */
}
 
#endif // _ISNAND2_H_
#endif /* __SPU__ */
 

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