OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [binutils-2.20.1/] [ld/] [testsuite/] [ld-spu/] [fixup.d] - Rev 818

Compare with Previous | Blame | View Log

#source: fixup.s
#ld: --emit-fixups
#objdump: -s 

.*elf32-spu

Contents of section .text:
 0000 00000000                             ....            
Contents of section .fixup:
 0004 0000008b 00000091 000000c1 00000000  ................
Contents of section .data:
 0080 000000d0 00000000 00000000 000000c0  ................
 0090 00000000 00000000 00000000 000000b0  ................
 00a0 00000001 00000000 00000000 00000000  ................
 00b0 00000002 00000000 00000000 00000000  ................
 00c0 00000000 00000000 00000000 00000080  ................
Contents of section .note.spu_name:
.*
.*
#pass

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.