OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [arm/] [thumb2-mul-space-3.c] - Rev 313

Go to most recent revision | Compare with Previous | Blame | View Log

/* In Thumb-2 mode, when optimizing for size, generate a "muls"
   instruction and use the resulting condition flags rather than a
   separate compare instruction.  */
/* { dg-options "-mthumb -Os" }  */
/* { dg-require-effective-target arm_thumb2_ok } */
/* { dg-final { scan-assembler "muls" } } */
/* { dg-final { scan-assembler-not "cmp" } } */
 
int x;
 
int f(int i, int j)
{
  i = i * j;
  if (i < 0)
    x = 1;
  return i;
}
 

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.