OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [altivec-33.c] - Rev 826

Compare with Previous | Blame | View Log

/* { dg-do compile } */
/* { dg-require-effective-target powerpc_altivec_ok } */
/* { dg-options "-O2 -maltivec" } */
 
/* We should only produce one vspltw as we already splatted the value.  */
/* { dg-final { scan-assembler-times "vspltw" 1 } } */
 
#include <altivec.h>
 
vector float f(vector float a)
{
  vector float b = vec_splat (a, 2);
  return vec_splat (b, 0);
}
 
 
 

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.