OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gcc-4.5.1/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [vsx-vector-4.c] - Rev 322

Go to most recent revision | Compare with Previous | Blame | View Log

/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
/* { dg-require-effective-target powerpc_vsx_ok } */
/* { dg-options "-O2 -ftree-vectorize -mcpu=power7" } */
/* { dg-final { scan-assembler "xvaddsp" } } */
/* { dg-final { scan-assembler "xvsubsp" } } */
/* { dg-final { scan-assembler "xvmulsp" } } */
/* { dg-final { scan-assembler "xvdivsp" } } */
/* { dg-final { scan-assembler "xvmadd" } } */
/* { dg-final { scan-assembler "xvmsub" } } */
 
__vector float a, b, c, d;
 
void
vector_add (void)
{
  a = b + c;
}
 
void
vector_subtract (void)
{
  a = b - c;
}
 
void
vector_multiply (void)
{
  a = b * c;
}
 
void
vector_multiply_add (void)
{
  a = (b * c) + d;
}
 
void
vector_multiply_subtract (void)
{
  a = (b * c) - d;
}
 
void
vector_divide (void)
{
  a = b / c;
}
 

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.