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[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [opcodes/] [ChangeLog] - Rev 841
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2010-07-06 Maciej W. Rozycki <macro@codesourcery.com>* mips-dis.c (print_insn_mips): Correct branch instruction typedetermination.2010-07-06 Maciej W. Rozycki <macro@codesourcery.com>* mips-dis.c (print_mips16_insn_arg): Remove branch instructiontype and delay slot determination.(print_insn_mips16): Extend branch instruction type and delayslot determination to cover all instructions.* mips16-opc.c (BR): Remove macro.(UBR, CBR): New macros.(mips16_opcodes): Update branch annotation for "b", "beqz","bnez", "bteqz" and "btnez". Add branch annotation for "jalrc"and "jrc".2010-07-05 H.J. Lu <hongjiu.lu@intel.com>AVX Programming Reference (June, 2010)* i386-dis.c (mod_table): Replace rdrnd with rdrand.* i386-opc.tbl: Likewise.* i386-tbl.h: Regenerated.2010-07-05 H.J. Lu <hongjiu.lu@intel.com>* i386-opc.h (CpuFSGSBase): Fix a typo in comments.2010-07-03 Andreas Schwab <schwab@linux-m68k.org>* ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx toppc_cpu_t before inverting.(ppc_parse_cpu): Likewise.(print_insn_powerpc): Likewise.2010-07-03 Alan Modra <amodra@gmail.com>* ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.* ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.(PPC64, MFDEC2): Update.(NON32, NO371): Define.(powerpc_opcode): Update to not use old opcode flags, and avoid-m601 duplicates.2010-07-03 DJ Delorie <dj@delorie.com>* m32c-ibld.c: Regenerate.2010-07-03 Alan Modra <amodra@gmail.com>* ppc-opc.c (PWR2COM): Define.(PPCPWR2): Add PPC_OPCODE_COMMON.(powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.","fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst","rac" from -mcom.2010-07-01 H.J. Lu <hongjiu.lu@intel.com>AVX Programming Reference (June, 2010)* i386-dis.c (PREFIX_0FAE_REG_0): New.(PREFIX_0FAE_REG_1): Likewise.(PREFIX_0FAE_REG_2): Likewise.(PREFIX_0FAE_REG_3): Likewise.(PREFIX_VEX_3813): Likewise.(PREFIX_VEX_3A1D): Likewise.(prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 andPREFIX_VEX_3A1D.(vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.(mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.* i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.(cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.* i386-opc.h (CpuXsaveopt): New.(CpuFSGSBase): Likewise.(CpuRdRnd): Likewise.(CpuF16C): Likewise.(i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd andcpuf16c.* i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.* i386-init.h: Regenerated.* i386-tbl.h: Likewise.2010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de>* ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrfand mtocrf on EFS.2010-06-29 Alan Modra <amodra@gmail.com>* maxq-dis.c: Delete file.* Makefile.am: Remove references to maxq.* configure.in: Likewise.* disassemble.c: Likewise.* Makefile.in: Regenerate.* configure: Regenerate.* po/POTFILES.in: Regenerate.2010-06-29 Alan Modra <amodra@gmail.com>* mep-dis.c: Regenerate.2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>* arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.2010-06-27 Alan Modra <amodra@gmail.com>* arc-dis.c (arc_sprintf): Delete set but unused variables.(decodeInstr): Likewise.* dlx-dis.c (print_insn_dlx): Likewise.* h8300-dis.c (bfd_h8_disassemble_init): Likewise.* maxq-dis.c (check_move, print_insn): Likewise.* mep-dis.c (mep_examine_ivc2_insns): Likewise.* msp430-dis.c (msp430_branchinstr): Likewise.* bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.* cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.* sparc-dis.c (print_insn_sparc): Likewise.* fr30-asm.c: Regenerate.* frv-asm.c: Regenerate.* ip2k-asm.c: Regenerate.* iq2000-asm.c: Regenerate.* lm32-asm.c: Regenerate.* m32c-asm.c: Regenerate.* m32r-asm.c: Regenerate.* mep-asm.c: Regenerate.* mt-asm.c: Regenerate.* openrisc-asm.c: Regenerate.* xc16x-asm.c: Regenerate.* xstormy16-asm.c: Regenerate.2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>PR gas/11673* m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>PR binutils/11676* m68k-dis.c (print_insn_arg): Prefix float constants with #0e.2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>* ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 ande500x2. Add PPC_OPCODE_E500 to e500 and e500x2* ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS whichtouch floating point regs and are enabled by COM, PPC or PPCCOM.Treat sync as msync on e500. Treat eieio as mbar 1 on e500.Treat lwsync as msync on e500.2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>* arm-dis.c (thumb-opcodes): Add disassembly for movs.2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>* arm-dis.c (print_insn_neon): Ensure disassembly of Neonconstants is the same on 32-bit and 64-bit hosts.2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>* m68k-dis.c (print_insn_m68k): Emit undefined instructions as.short directives so that they can be reassembled.2010-05-26 Catherine Moore <clm@codesourcery.com>David Ung <davidu@mips.com>* mips-opc.c: Change membership to I1 for instructions ssnop andehb.2010-05-26 H.J. Lu <hongjiu.lu@intel.com>* i386-dis.c (sib): New.(get_sib): Likewise.(print_insn): Call get_sib.OP_E_memory): Use sib.2010-05-26 Catherine Moore <clm@codesoourcery.com>* mips-dis.c (mips_arch): Remove INSN_MIPS16.* mips-opc.c (I16): Remove.(mips_builtin_op): Reclassify jalx.2010-05-19 Alan Modra <amodra@gmail.com>* ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.2010-05-13 Alan Modra <amodra@gmail.com>* ppc-opc.c (powerpc_opcodes): Correct wclr encoding.2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>* arm-dis.c (thumb_opcodes): Update ldmia entry to use new %Wformat.(print_insn_thumb16): Add support for new %W format.2010-05-07 Tristan Gingold <gingold@adacore.com>* Makefile.in: Regenerate with automake 1.11.1.* aclocal.m4: Ditto.2010-05-05 Nick Clifton <nickc@redhat.com>* po/es.po: Updated Spanish translation.2010-04-22 Nick Clifton <nickc@redhat.com>* po/opcodes.pot: Updated by the Translation project.* po/vi.po: Updated Vietnamese translation.2010-04-16 H.J. Lu <hongjiu.lu@intel.com>* i386-dis.c (get_valid_dis386): Return bad_opcode on unknownbits in opcode.2010-04-09 Nick Clifton <nickc@redhat.com>* i386-dis.c (print_insn): Remove unused variable op.(OP_sI): Remove unused variable mask.2010-04-07 Alan Modra <amodra@gmail.com>* configure: Regenerate.2010-04-06 Peter Bergner <bergner@vnet.ibm.com>* ppc-opc.c (RBOPT): New define.("dccci"): Enable for PPCA2. Make operands optional.("iccci"): Likewise. Do not deprecate for PPC476.2010-04-02 Masaki Muranaka <monaka@monami-software.com>* cr16-opc.c (cr16_instruction): Fix typo in comment.2010-03-25 Joseph Myers <joseph@codesourcery.com>* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.* Makefile.in: Regenerate.* configure.in (bfd_tic6x_arch): New.* configure: Regenerate.* disassemble.c (ARCH_tic6x): Define if ARCH_all.(disassembler): Handle TI C6X.* tic6x-dis.c: New.2010-03-24 Mike Frysinger <vapier@gentoo.org>* bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.2010-03-23 Joseph Myers <joseph@codesourcery.com>* dis-buf.c (buffer_read_memory): Give error for reading justbefore the start of memory.2010-03-22 Sebastian Pop <sebastian.pop@amd.com>Quentin Neill <quentin.neill@amd.com>* i386-dis.c (OP_LWP_I): Removed.(reg_table): Do not use OP_LWP_I, use Iq.(OP_LWPCB_E): Remove use of names16.(OP_LWP_E): Same.* i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insnsshould not set the Vex.length bit.* i386-tbl.h: Regenerated.2010-02-25 Edmar Wienskoski <edmar@freescale.com>* ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".2010-02-24 Nick Clifton <nickc@redhat.com>PR binutils/6773* arm-dis.c (arm_opcodes): Replace <prefix>addsubx with<prefix>asx. Replace <prefix>subaddx with <prefix>sax.(thumb32_opcodes): Likewise.2010-02-15 Nick Clifton <nickc@redhat.com>* po/vi.po: Updated Vietnamese translation.2010-02-12 Doug Evans <dje@sebabeach.org>* lm32-opinst.c: Regenerate.2010-02-11 Doug Evans <dje@sebabeach.org>* cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.(print_address): Delete CGEN_PRINT_ADDRESS.* fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,* lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,* m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,* xc16x-dis.c, * xstormy16-dis.c: Regenerate.* fr30-desc.c, * fr30-desc.h, * fr30-opc.c,* frv-desc.c, * frv-desc.h, * frv-opc.c,* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,* m32c-desc.c, * m32c-desc.h, * m32c-opc.c,* m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,* mep-desc.c, * mep-desc.h, * mep-opc.c,* mt-desc.c, * mt-desc.h, * mt-opc.c,* openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,* xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,* xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.2010-02-11 H.J. Lu <hongjiu.lu@intel.com>* i386-dis.c: Update copyright.* i386-gen.c: Likewise.* i386-opc.h: Likewise.* i386-opc.tbl: Likewise.2010-02-10 Quentin Neill <quentin.neill@amd.com>Sebastian Pop <sebastian.pop@amd.com>* i386-dis.c (OP_EX_VexImmW): Reintroducedfunction to handle 5th imm8 operand.(PREFIX_VEX_3A48): Added.(PREFIX_VEX_3A49): Added.(VEX_W_3A48_P_2): Added.(VEX_W_3A49_P_2): Added.(prefix table): Added entries for PREFIX_VEX_3A48and PREFIX_VEX_3A49.(vex table): Added entries for VEX_W_3A48_P_2 andand VEX_W_3A49_P_2.* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4for Vec_Imm4 operands.* i386-opc.h (enum): Added Vec_Imm4.(i386_operand_type): Added vec_imm4.* i386-opc.tbl: Add entries for vpermilp[ds].* i386-init.h: Regenerated.* i386-tbl.h: Regenerated.2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"and "pwr7". Move "a2" into alphabetical order.2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>* ppc-dis.c (ppc_opts): Add titan entry.* ppc-opc.c (TITAN, MULHW): Define.(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).2010-02-03 Quentin Neill <quentin.neill@amd.com>* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGSto CPU_BDVER1_FLAGS* i386-init.h: Regenerated.2010-02-03 Anthony Green <green@moxielogic.com>* moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to0x0f, and make 0x00 an illegal instruction.2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>* opcodes/arm-dis.c (struct arm_private_data): New.(print_insn_coprocessor, print_insn_arm): Update to use structarm_private_data.(is_mapping_symbol, get_map_sym_type): New functions.(get_sym_code_type): Check the symbol's section. Do not checkmapping symbols.(print_insn): Default to disassembling ARM mode code. Checkfor mapping symbols separately from other symbols. Usestruct arm_private_data.2010-01-28 H.J. Lu <hongjiu.lu@intel.com>* i386-dis.c (EXVexWdqScalar): New.(vex_scalar_w_dq_mode): Likewise.(prefix_table): Update entries for PREFIX_VEX_3899,PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,PREFIX_VEX_38BD and PREFIX_VEX_38BF.(intel_operand_size): Handle vex_scalar_w_dq_mode.(OP_EX): Likewise.2010-01-27 H.J. Lu <hongjiu.lu@intel.com>* i386-dis.c (XMScalar): New.(EXdScalar): Likewise.(EXqScalar): Likewise.(EXqScalarS): Likewise.(VexScalar): Likewise.(EXdVexScalarS): Likewise.(EXqVexScalarS): Likewise.(XMVexScalar): Likewise.(scalar_mode): Likewise.(d_scalar_mode): Likewise.(d_scalar_swap_mode): Likewise.(q_scalar_mode): Likewise.(q_scalar_swap_mode): Likewise.(vex_scalar_mode): Likewise.(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,q_scalar_mode, q_scalar_swap_mode.(OP_XMM): Handle scalar_mode.(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_modeand q_scalar_swap_mode.(OP_VEX): Handle vex_scalar_mode.2010-01-24 H.J. Lu <hongjiu.lu@intel.com>* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.2010-01-24 H.J. Lu <hongjiu.lu@intel.com>* i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.2010-01-24 H.J. Lu <hongjiu.lu@intel.com>* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.2010-01-24 H.J. Lu <hongjiu.lu@intel.com>* i386-dis.c (Bad_Opcode): New.(bad_opcode): Likewise.(dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.(dis386_twobyte): Likewise.(reg_table): Likewise.(prefix_table): Likewise.(x86_64_table): Likewise.(vex_len_table): Likewise.(vex_w_table): Likewise.(mod_table): Likewise.(rm_table): Likewise.(float_reg): Likewise.(reg_table): Remove trailing "(bad)" entries.(prefix_table): Likewise.(x86_64_table): Likewise.(vex_len_table): Likewise.(vex_w_table): Likewise.(mod_table): Likewise.(rm_table): Likewise.(get_valid_dis386): Handle bytemode 0.2010-01-23 H.J. Lu <hongjiu.lu@intel.com>* i386-opc.h (VEXScalar): New.* i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalarinstructions.* i386-tbl.h: Regenerated.2010-01-21 H.J. Lu <hongjiu.lu@intel.com>* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.* i386-opc.tbl: Add xsave64 and xrstor64.* i386-tbl.h: Regenerated.2010-01-20 Nick Clifton <nickc@redhat.com>PR 11170* arm-dis.c (print_arm_address): Do not ignore negative bit in PCbased post-indexed addressing.2010-01-15 Sebastian Pop <sebastian.pop@amd.com>* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.* i386-tbl.h: Regenerated.2010-01-14 H.J. Lu <hongjiu.lu@intel.com>* i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS incomments.2010-01-14 H.J. Lu <hongjiu.lu@intel.com>* i386-dis.c (names_mm): New.(intel_names_mm): Likewise.(att_names_mm): Likewise.(names_xmm): Likewise.(intel_names_xmm): Likewise.(att_names_xmm): Likewise.(names_ymm): Likewise.(intel_names_ymm): Likewise.(att_names_ymm): Likewise.(print_insn): Set names_mm, names_xmm and names_ymm.(OP_MMX): Use names_mm, names_xmm and names_ymm.(OP_XMM): Likewise.(OP_EM): Likewise.(OP_EMC): Likewise.(OP_MXC): Likewise.(OP_EX): Likewise.(XMM_Fixup): Likewise.(OP_VEX): Likewise.(OP_EX_VexReg): Likewise.(OP_Vex_2src): Likewise.(OP_Vex_2src_1): Likewise.(OP_Vex_2src_2): Likewise.(OP_REG_VexI4): Likewise.2010-01-13 H.J. Lu <hongjiu.lu@intel.com>* i386-dis.c (print_insn): Update comments.2010-01-12 H.J. Lu <hongjiu.lu@intel.com>* i386-dis.c (rex_original): Removed.(ckprefix): Remove rex_original.(print_insn): Update comments.2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>* Makefile.in: Regenerate.* configure: Regenerate.2010-01-07 Doug Evans <dje@sebabeach.org>* cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,* xstormy16-ibld.c: Regenerate.2010-01-06 Quentin Neill <quentin.neill@amd.com>* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.* i386-init.h: Regenerated.2010-01-06 Daniel Gutson <dgutson@codesourcery.com>* arm-dis.c (print_insn): Fixed search for next symbol and datadumping condition, and the initial mapping symbol state.2010-01-05 Doug Evans <dje@sebabeach.org>* cgen-ibld.in: #include "cgen/basic-modes.h".* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,* xstormy16-ibld.c: Regenerate.2010-01-04 Nick Clifton <nickc@redhat.com>PR 11123* arm-dis.c (print_insn_coprocessor): Initialise value.2010-01-04 Edmar Wienskoski <edmar@freescale.com>* ppc-dis.c (ppc_opts): Add entry for "e500mc64".2010-01-02 Doug Evans <dje@sebabeach.org>* cgen-asm.in: Update copyright year.* cgen-dis.in: Update copyright year.* cgen-ibld.in: Update copyright year.* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.For older changes see ChangeLog-2009Local Variables:mode: change-logleft-margin: 8fill-column: 74version-control: neverEnd: