OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [sim/] [microblaze/] [ChangeLog] - Rev 841

Compare with Previous | Blame | View Log

2010-04-14  Mike Frysinger  <vapier@gentoo.org>

        * interp.c (sim_write): Add const to buffer arg.

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.