OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [cr16/] [excp.cgs] - Rev 330

Go to most recent revision | Compare with Previous | Blame | View Log

# cr16 testcase for excp uimm4
# mach(): cr16

        .include "testutils.inc"

        start

        .global excp
excp:
        pass # pass macro use the excp 8
 
## Test 1: bbpsw = 0, bpsw = 1, psw = 0
#
#       # bbsm = 0, bie = 0, bbcond = 0
#       movw $0, r4
#       lpr r4, cr8
#
#       # bsm = 1, bie = 1, bcond = 1, sm = 0, ie = 0, cond = 0
#       movw $0xc100, r4
#       lpr r4, cr0
#
#       # bbpc = 0
#       movw $0, r4
#       mvtc r4, bbpc
#
#       # bpc = 42
#       mvaddr_h_gr r4, 42
#       mvtc r4, bpc
#
#       # Copy excp2_handler to excp area of memory.
#       ld24 r0,#0x48 # address of excp 2 handler
#       ld24 r1,#excp2_handler
#       ld r2,@r1
#       st r2,@r0
#       # Set up return address.
#       ld24 r5,#excp2_ret1
#
#excp_insn1:
#       excp 2
#       fail
#
#excp2_ret1:
#       # test bbsm = 1, bbie = 1, bbcond = 1
#       mvfc r4, cr8
#       test_h_gr r4, 0xc1
#
#       # test bsm = 0, bie = 0, bcond = 0, sm = 0, ie = 0, cond = 0
#       mvfc r4, cr0
#       test_h_gr r4, 0
#
#       # test bbpc = 42
#       mvfc r4, bbpc
#       test_h_gr r4, 42
#
#       # test bpc = proper return address
#       mvfc r4, bpc
#       test_h_gr r4, excp_insn1 + 4
#
## Test 2: bbpsw = 1, bpsw = 0, psw = 1
#
#       # bbsm = 1, bie = 1, bbcond = 1
#       mvi_h_gr r4, 0xc1
#       mvtc r4, cr8
#
#       # bsm = 0, bie = 0, bcond = 0, sm = 1, ie = 1, cond = 1
#       mvi_h_gr r4, 0xc1
#       mvtc r4, cr0
#
#       # bbpc = 42
#       mvaddr_h_gr r4, 42
#       mvtc r4, bbpc
#
#       # bpc = 0
#       mvaddr_h_gr r4, 0
#       mvtc r4, bpc
#
#       # Set up return address.
#       ld24 r5,#excp2_ret2
#
#excp_insn2:
#       excp #2
#       fail
#
#excp2_ret2:
#       # test bbsm = 0, bbie = 0, bbcond = 0
#       mvfc r4, cr8
#       test_h_gr r4, 0
#
#       # test bsm = 1, bie = 1, bcond = 1, sm = 1, ie = 0, cond = 0
#       mvfc r4, cr0
#       test_h_gr r4, 0xc180
#
#       # test bbpc = 0
#       mvfc r4, bbpc
#       test_h_gr r4, 0
#
#       # test bpc = proper return address
#       mvfc r4, bpc
#       test_h_gr r4, excp_insn2 + 4
#
#       pass
#
#       .data
#
## Don't use rte as it will undo the effects of excp we're testing.
#
#       .p2align 2
#excp2_handler:
#       jmp r5
#       nop

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.