OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [cr16/] [tbitw.cgs] - Rev 841

Compare with Previous | Blame | View Log

# cr16 testcase for tbitw
# mach:  cr16

        .include "testutils.inc"

        start

        .global tbitw
tbitw:
        movw $0, r1
        lpr     r1, psr
        tbitw   $0,_y
        spr  psr, r1
        cmpb    $0x20, r1
        beq ok1
not_ok:
        fail

ok1:
        movw $0, r1
        lpr     r1, psr
        movd   $_y, (r1,r0)
        tbitw   $1,0(r1,r0)
        loadw   _y, r1
        spr  psr, r1
        cmpb    $0x20, r1
        beq ok2
        br not_ok
ok2:

        pass

_y:     .word   0xf7

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.