OpenCores

URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-stable/] [gdb-7.2/] [sim/] [testsuite/] [sim/] [m32r/] [srai.cgs] - Rev 841

Compare with Previous | Blame | View Log

# m32r testcase for srai $dr,#$uimm5
# mach(): m32r m32rx

        .include "testutils.inc"

        start

        .global srai
srai:
        mvi_h_gr  r5, 0xf0f0f0ff
        srai      r5, #4
        test_h_gr r5, 0xff0f0f0f

        pass

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.