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https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
[/] [openrisc/] [trunk/] [or1k_startup/] [backend/] [ACTEL/] [smartgen/] [smartgen.aws] - Rev 167
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<?xml version="1.0" encoding="UTF-8" standalone="no" ?><workspace xmlns="http://actel.com/sweng/afi"><name>smartgen</name><netlistFormat>Verilog</netlistFormat><reports><resource select="T"/></reports><subproject libero="T"/><hdltype>Verilog</hdltype><componentInstances/><component name="flash::work"/><device die="IS8X8M2" family="ProASIC3" package="pq208"/><SmartGen version="8.0"/></workspace>Go to most recent revision | Compare with Previous | Blame | View Log