OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1k_startup/] [rtl/] [verilog/] [Makefile] - Rev 2

Compare with Previous | Blame | View Log

spi:
        vppp --simple spi_clgen.v spi_shift.v spi_top.v | cat copyright_spi.v - > spi_flash.v

OR1K_startup:
        vppp --simple +define+SPI_BASE_MSB+B000 OR1K_startup_generic.v | cat copyright_OR1K_startup.v - > OR1K_startup.v

OR1K_startup_ACTEL:
        vppp --simple OR1K_startup_ACTEL.v | cat copyright_OR1K_startup.v - > OR1K_startup_ACTEL_IP.v

all: spi OR1K_startup OR1K_startup_ACTEL
        

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.